Engineering publications brought to you by Mark Allen

EDA & Design Software

Cadence accelerates intelligent SoC development

R&S VSESIM-VSS combines EDA simulation with hardware testing

Cadence and Samsung accelerate 3nm mixed-signal silicon

QuickLogic announces Australis eFPGA IP Generator

Tower and Cadence unveil 5G and automotive IC reference flow

Digikey and EMA Design release OrCAD Capture Bundle

Sondrel modelling flow looks to cut ASIC modelling time

Cadence unveils a revolutionary new ML-based EDA tool

Avishtech to join Altium’s Nexar Partner Ecosystem

Aldec launches HES board for ASIC & SoC designs

Cadence and UMC collaborate on 22ULP/ULL reference flow certification

Andes certifies Imperas RISC-V Reference Models for SIMD/DSP extension