Engineering publications brought to you by Mark Allen

Memory

Ad hoc cache hierarchies make chips more efficient

STMicro partners with Kilopass for OTP NVM memory

Chip combines computing and data storage in 3D

Toshiba takes flash to 96 layers

Solution to shrink digital data storage

Thin films could enable future ReRAM

64 layer NAND flash goes into volume

Don’t settle for the ordinary, said Tom Beckley at CDNLive

Superconducting memory cell could be smaller, cheaper

Breakthrough in CMOS-compatible ferroelectric memory

Magnetoelectric memory cell uses less power

Model found for 2D materials based memory