Could you schedule tasks between 1000 cores? UCD team says it can

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Multicore – even many core – processors are nothing new. It’s a decade or so since the technology entered the mainstream and the device on which you’re reading this is likely to be powered by a quad core processor.

Why multicore is an easy question to answer; clock speeds can’t be pushed high enough for one core to do all the work.

There are two choices: symmetrical (SMP) or asymmetrical (AMP) multiprocessing. In the first choice, each core is treated equally, but operates independently. Usually, the cores share a memory, but have their own cache. Any SMP core can work on any task. In the latter choice, not all cores are equal; applications might be allocated to a particular core, for example.

One issue with multicore processors is deciding which tasks run on which core. That can be easier with AMP, but SMP offers more challenges. Consider, then, how the team from the University of California, Davis (UCD) will handle the scheduling problem for its 1000 core chip – the so called KiloCore device.

According to UCD’s Professor Bevan Baas, the approach is to break an application into many small pieces, each of which can run in parallel on different processors – not necessarily the whole 1000. This is said to result in high throughput with lower energy use. Apparently, the team says the chip consumes just 0.7W when handling 115billion instructions per second. It will be interesting to find out just how the team has managed to do it at such high efficiency.

Europe isn’t standing on the sidelines, however. The EMC2 Project, running under the auspices of Artemis, is in its third year of developing multicore technology for embedded applications.

By next year, it hopes to be demonstrating what it calls an ‘asymmetric multicore approach’ featuring multiple 8- and 32bit soft core CPUs, along with two hard ARM9 CPUs.

Interesting times for multicore development.