Matching up MCUs

1 min read

The microcontroller world has always been competitive, but things appear to have ratcheted up a notch or two over the last few weeks as developers jostle with each other to claim they produce the most energy efficient ultra low power (ULP) MCU.

STMicroelectronics kicked things off at embedded world in February, claiming a score of 123 on the ULPmark scale for its STM32L476 and 486 parts. Texas Instruments was next up, with a score of 167.4 for its recently released MSP432P401R. Finally, Atmel has just claimed a score 185.8 for its SAML21J18A.

This outbreak of what could be called 'performance envy' has been enabled by the launch by EEMBC – the Embedded Microprocessor Benchmark Consortium – late in 2014 of ULPBench, a benchmarking suite aimed specifically at low power MCUs.

According to EEMBC, ULPBench allows designers to investigate more closely the relative performance of an increasing number of MCUs 'claiming ULP capabilities'.

On first sight, you wonder whether 'apples' are being compared with 'apples'; the devices from ST, TI and Atmel use different Cortex-M cores running at different clock rates. But EEMBC says its benchmark is clock rate and architecture agnostic; it will simply tell you, via the ULPmark, whether one MCU uses energy more efficiently than another when performing the same tasks.

Why is this of interest? Because many devices being developed for IoT applications will be battery powered and the design goal will be for the battery to be changed as little as possible. In fact, one of the defined base rules for ULPBench states that a ULP application needs to be able to run from one CR2032 battery for more than four years.

At the moment, the benchmark examines the CPU and real time clock, but work in progress is looking to extend this to take the performance of peripherals into account.

What EEMBC has done over almost 20 years of operation is to bring more rigour to what was a random way of comparing processor performance. Before EEMBC's benchmarks, companies used MIPS, or millions of instructions per second. Because there were no conditions attached to a MIPS figure, many of us had another definition – meaningless indication of performance.