Engineering publications brought to you by Mark Allen

EDA & Design Software

Cadence debuts Allegro X Design Platform

Synopsys launches Die-to-Die controller IP

Sondrel launches SFA 350A platform delivering faster time to market for ADAS ASICs

Democratising chip design

Aldec provides easier access to FPGA-based ASIC & SoC prototyping

Silicon Catalyst launches UK-based Accelerator

Cadence addresses EM analysis with Clarity 3D Solver on the Cloud

Cadence collaboration with Arm enables tape-out of next-generation mobile designs

Third-generation 112G-LR SerDes IP

Cadence unveils low-power IP for PCI Express 5.0 specification on TSMC N5 process

Cadence introduces Spectre FX FastSPICE simulator

Efabless launches chipIgnite with SkyWater