When hardware description languages (hdls) and synthesis brought a much needed step change in digital ic design productivity, it was easy to assume the same would happen for analogue design. Wrong! Two decades on, and with analogue extensions to Vhdl and Verilog established, there has been no corresponding dramatic increase in analogue design productivity. In the words of Jim Solomon, analogue design and simulation guru and Cadence founder: “Analogue synthesis is a complete disappointment.”
Fast Spice solvers are available for simulation, yet most analogue designers still rely on the traditional Spice algorithm. Other analogue eda tools, such as schematic driven placement, have been developed to provide a degree of automation to both schematic design and physical placement tasks. But any analogue eda vendor will confirm that adoption is poor.
Are the tools not effective or appropriate, so engineers have no choice but to design manually? Or do analogue designers relish their reputation for being creative, preferring the hand crafted approach and resisting change? The answer, is most likely, an element of both.
A recent panel discussion at DATE brought together analogue designers and tool providers, though some protagonists could claim to be from both camps. The moderator, Professor Dr Lars Hedrich of the University of Frankfurt, asked this question: “Is analogue design still more art than engineering?” He believes it remains an art and that the vision of analogue synthesis is still far in the future.
