Meeting the E-band challenge
4 mins read
Although complex and time consuming to design, E-band mmics could open up new communications channels. By Liam Devlin.
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There is significant interest in the use of E-band for very high data rate communications, stemming from the worldwide availability, under a 'light license' basis, of a large amount of spectrum at 71 to 76GHz and 81 to 86GHz. However, the design of electronic equipment at such high frequencies is challenging and the prices of systems and components are equally high.
The use of E-band links in very high volumes – wireless backhaul for mobile communications networks is the leading contender – will only happen once the price of equipment falls to an acceptable level. This, in turn, requires the ready availability of component parts with adequate performance at acceptable costs.
Although it is possible to manufacture E-band microwave monolithic integrated circuits (MMICs) in high volumes at a low cost, there are limited ranges of commercially available parts and their unit cost could not be described as low. The problem is that developing E-band MMICs is complex and time consuming and therefore costly. Unless the MMIC supplier has confidence in receiving volume orders, it can be difficult to justify the required investment.
The first consideration is to identify a commercially available, fully released process that can offer useful gain across E-band frequencies. Short geometry cmos and SiGe processes can provide gain at E-band and numerous circuits at high mm wave frequencies have been demonstrated. However, all commercially available E-band links for wireless backhaul use GaAs based front ends. The reason for this is that an acceptable noise figure (NF) and adequate linearity are essential requirements and GaAs technology offers superior performance in these respects.
The commercially available GaAs processes that can provide useful gain at E-band can be split into three categories:
* pseudomorphic high electron mobility transistors (pHEMTs) with gate lengths of 0.13 or 0.15µm
* metamorphic HEMTs (mHEMTs) with a gate length of 0.15µm
* pHEMTs with a gate length of 0.1µm.
There is a minimum level of available transistor gain below which it is not practical to consider realising circuit blocks; 6dB is a realistic lower limit. The available gain of a transistor is dependent upon the process, the device size (number of gate fingers and unit gate width), the rf grounding inductance (which reduces with substrate thickness) and the bias point.
As the total transistor gate width increases (more gate fingers and/or wider unit gate width), parasitic effects increase, which reduces the available high frequency gain. For a given process and bias point, there is thus a maximum transistor size that can be considered, which limits the transistor's maximum rf power handling and linearity.
While mHEMT processes tend to offer a little more gain and a slightly lower minimum NF than pHEMT processes of the same gate length, breakdown voltages and power densities (output power per unit gate width) are lower. This means they are less suitable for the realisation of amplifiers requiring higher linearity or output power.
Even the low noise amplifiers (LNAs) in point to point receiver equipment have non trivial linearity requirements and the advantages of the mHEMT processes are not sufficient to recommend them for the development of commercial E-band MMICs.
Most commercially available 0.15µm or 0.13µm gate length pHEMT processes can provide gain across E-band, but the maximum practical transistor size (in order to retain an acceptable level of available gain) is relatively small. With 0.1µm gate length processes, larger device sizes can be considered, which means the achievable linearity and output power levels are higher. Bias conditions and breakdown voltage must also be assessed and, having taken this into account, it is possible to say the best commercially available GaAs for output power and linearity at E-band is the 0.1µm gate length pHEMT.
The remaining process feature that needs to be considered is substrate thickness. Most commercially available GaAs processes have a substrate thickness of 100µm. However, some processes feature a 50µm substrate, which offers lower grounding inductance and improved performance at E-band. The availability of intersource grounding (through substrate vias directly under the transistor's source fingers) can also help reduce source-grounding inductance.
The fundamental challenge when designing E-band MMICs is to retain an acceptable level of gain per stage whilst achieving the required linearity. The transistor's available gain is modest and there is little margin to be sacrificed in the practical implementation of matching networks, biasing components or stabilisation networks. In order to increase the power handing/linearity, transistor size and bias current must be increased. Larger transistors have reduced gain and, for a given process, there will be a maximum transistor size that can be considered. Obviously, linearity and power handling can be increased by combining multiple transistors, but the losses of the combining structures make this a process of diminishing returns.
Those pHEMT processes capable of operation at E-band generally have a very good NF. The difficulty with designing E-band LNAs is the techniques normally adopted to simultaneously achieve good input return loss and low NF (such as applying series inductive feedback) also reduce gain. The most practical approach is to select a device size and bias point with low NF in mind and to then match conjugately for maximum gain and to accept the resulting performance.
It is normal to start the design process with ideal passive elements and active device models. Once acceptable performance is achieved, the design is moved to a practical implementation with the incorporation of representative passive models to simulate parasitics and discontinuities. With E-band circuits it is always essential to perform an electromagnetic (EM) simulation to account accurately for all proximity and discontinuity effects associated with the layout and many 3d and 2.5d EM simulation packages are now available.
Figure 2 shows an E-band gain block, together with a comparison of the measured and EM simulated performance. This was fabricated on WIN Semiconductor's PP15-20 process, with 0.15µm gate length pHEMTs. While this has a 100µm substrate and is probably not ideal for E-band MMICs, it demonstrates more than 4dB of gain per stage in the 71 to 76GHz band and, perhaps more importantly, shows reasonably good agreement between simulated and measured performance. In addition to accurate EM simulation, good device models are required which are valid across the frequency range of interest.
It is worth restating that the complexity of this task is far from trivial. The inherent gain available from the transistors is limited and great care must be taken to avoid losing performance during the detailed design and simulation process. Larger transistors have less gain, which presents restrictions on the practical output power and linearity performance that can be achieved. The absence of excess gain also prohibits the use of conventional LNA design techniques and limits the designer's ability to reduce the NF.
However, the development of E-band MMICs is possible with current commercially available processes and the main barrier preventing wider availability of such devices is the commercial leap of faith needed to believe the volume of the market will justify the development costs.
Liam Devlin is Plextek's rf integration group director.