Sponsored story: Challenging problems, smart solutions

To meet the demands of 3G-LTE basestations, dsp manufacturers are developing high speed multicore processors. While increasing basestation density by supporting more channels, these devices put pressure on designers to create higher power, more robust power supplies. The importance of a good power supply for complex dsps should not be overlooked. A good power supply must cope with dynamic load switching conditions and still control the noise and crosstalk seen in high speed processor design. Dynamic transients in dsps are caused by high switching frequencies and transitions in and out of low power mode. These fast transients can cause high voltage droops, depending upon bandwidth and the layout of the power supply design. Power supplies must also handle the high in rush currents, caused by bus contention and the charging of decoupling capacitors. Without this ability, output voltage may drop beyond the processor's tolerance. Choosing the regulator is one of the first dsp power supply design decisions. There are two general types – linear and switching. Linear regulation is a simple topology; a pass element combined with an error amplifier. Linear regulators have low output noise and good transient performance, due to their typically higher loop bandwidth. Their major drawbacks are inefficiency at high loads and when the difference between input and output voltage is large. Typically, a 3.3 or 5V input is dropped to an output ranging from 1 to 1.2V. This difference, multiplied by loads of 5A or greater, can lead to power dissipations larger than the linear regulator package can handle. So the popular choice is switching regulators. Switching regulators use an inductor and capacitor to store and transfer energy from input to output. This is more efficient because the pass element is not always transferring power to the output. Switching regulators come in pulse frequency modulation (pfm) and pulse width modulation (pwm) variants. PFM switching regulators are known for their light load efficiencies, important for dsps going in and out of low power mode. But noise is generally higher than with pwm regulators, due to the large amount of current dumped to the output at the beginning of every cycle. This can be improved with additional capacitors at the output. PWM regulators operate at a fixed frequency, altering pulse width to maintain the correct output voltage. In general, pwm regulators are lower noise and use smaller components when operating at higher frequencies. However, lower efficiency at light loads could be problematic for processors in low power mode. An important specification on every dsp data sheet is power supply voltage tolerance. Finding an appropriate power supply requires careful planning as it must overcome many challenges in order to meet this spec. The supply's output voltage accuracy can dig into a large portion of the tolerance. For example, a typical dsp might need 1.2V for the core and 1.8V for the I/O, both at 5% tolerance. A supply with a 2% over temperature output accuracy could leave the designer with only 3% for the other challenges. Fortunately, input voltage is relatively stable and, with good layout of decoupling capacitors, the designer should not have to worry about the line regulation spec. However, designers must pay attention to load regulation: dsps face multiple loads and go in and out of low power mode. Typical load regulation specifications can vary from 0.2 to 0.5%, reaching farther into the total tolerance of the supply. Lastly, load changes will not only affect the regulation; their fast dynamic nature will also cause large and fast load supply transients. The supply's response must be swift and strong enough to maintain the output voltage during these dynamic transients. While large output capacitors will help to alleviate voltage drop, most power will come from the supply's loop bandwidth and gain. Loop bandwidth determines how fast the supply reacts to load changes, and the gain shows strength of reaction. Designers need to pay careful attention to these specifications and to load transient behaviour when choosing the supply for their dsps. Designers often overlook the benefits of good power supply layout. Correct placement of the decoupling capacitor, especially for switching regulators, can assist in minimising noise and crosstalk. By placing the switching regulator's input capacitor close to the input pin, deviation in input supply can be reduced. This minimises the effects of line transients and reduces output deviation by up to 0.5%. As most dsps have a 5% tolerance, this is significant. Decoupling capacitors and inductors should be placed closed to the device to maintain a small current loop. In switching regulators, the switch node is a high frequency node with voltages switching from approximately ground to Vin. Poor layout can lead to the switch node interfering with other signals in the system. Micrel's MIC22950 is suitable for supplying a dsp's core voltage. Most dsp manufacturers feel it is good practice to provide at least twice the maximum calculated core current consumption and, with its ability to provide 10A, the MIC22950 can stop current starvation. An important feature of the MIC22950 is ramp control (RC). DSP power supplies need to come up in a particular order and, by using the RC pin with the Power-On Reset POR pin, designers can perform windowed, delayed and ratiometric sequencing. The MIC22950 is part of a family of products which uses SuperThermal FET technology. By using SuperThermal technology with the MIC22950, Micrel has achieved a power density of 0.4A/mm2 – almost double that of competitive devices. Power density relates output power to package size. Since board space in a basestation is finite, designers cannot increase power supply size without bound. This means designers choose parts with the highest power density to ensure the circuitry receives adequate power, while not taking up unnecessary board space. Meanwhile, the MIC23153 is suitable for powering the dsp's I/O. With 2A current capability and a HyperLight Load (HLL) architecture, the MIC23153 can supply highly efficient power at light and heavy loads. For light load applications, the HLL architecture uses the charge stored in the output capacitance to maintain the output voltage. Since load current is low, output voltage will take longer to fall. In the off state, the MIC23153 disables everything in the current loop, apart from the error comparator and the bandgap, saving even more power. Once the output drops below the bandgap voltage, the HLL architecture sends a signal to enable the high side transistor. Turning on the output only when necessary, the patented Micrel architecture uses pfm to provide high efficiency at light loads. At heavy loads, the MIC23153 operates in fixed frequency pwm mode, thus combining the benefits of pfm and pwm regulators. An additional benefit of the MIC23153 is the power good (PG) function. When connected to the output voltage, the PG pin will assert high when the output voltage is more than 92% of its set point. This pin can be used with voltage monitors and the MIC22950 to assist in dsp sequencing. As the wireless market evolves, the power industry must keep up. DSPs are becoming more integrated and faster, placing more pressure on power supplies. By understanding the importance of pertinent specifications and careful layout, designers can create a high power, yet robust, supplies. Daniel Cheng is an applications engineer at Micrel.