Nitin Sharma, product marketing manager, high speed ADC group, Analog Devices

NE: Are advances in data converter design, including continuous time sigma delta technology, helping to meet engineer’s growing needs? NS: Historically, the industry has been served by a set of analogue to digital (a/d) converter architectures that generally have delivered either great resolution or great conversion speed (sampling rate). In other words, there has been an underlying assumption that it is technologically impossible to achieve extremely high resolution and ultra high speed from the same device. The fastest commercial a/d converters today, for example, sample in the 1 to 2GHz range, but with a resolution typically limited to 8bit. On the other hand, converters offering 18bit, and even 24bit, resolution are saddled with sample rates ranging only to 1 or 2MHz – even less in the case of 24bit a/d converters. NE: What can we expect for 2009? NS: In the coming year, the ever increasing performance needs of cellular communications, medical imaging, consumer entertainment and other end markets will give rise to a new converter architecture, known as continuous-time sigma-delta (CTSD), which achieves superior resolution without compromising speed. The results will be felt in many important end applications. For example, cellular base stations will capture a wider swath of the rf spectrum while, at the same time, maintain excellent resolution to capture weaker cellular signals in the presence of very strong ones. The result: cell phone subscribers will experience fewer dropped calls over a wider call area. Indeed, data converters play a pivotal role in a tremendously wide and growing range of electronic systems. The medical imaging, industrial and even consumer markets are finding that data converters are enhancing the end user experience in everything from digital X-ray to high definition tvs, GPS devices and game consoles. NE: How has the role of system designer evolved? NS: Before the advent of CTSD, systems designers had a clearly defined set of choices. When they needed sampling rates of more than a few MHz, they turned to pipeline a/d converters. These employ a multiple stage structure whereby each stage works on one to a few bits of successive samples concurrently. At the end of each period of a particular clock cycle, the output of a given stage is passed to the next stage, and new data is shifted into the stage. The final multibit result is obtained by concatenating the bit results from each stage. Over the last few years, designers have pushed pipelined architectures to higher sampling speeds and resolutions. Today, devices are available with sampling rates ranging from a few Msample/s to more than 100Msample/s and with resolutions from 8 to 16bit. Representing more than 40% of the entire a/d converter market, according to research firm Databeans, pipeline a/d converters are commonly used in applications ranging from CCD imaging and ultrasonic medical imaging systems to cellular base stations and consumer digital video applications, such as HDTVs. On the other hand, when an application requires higher resolution and sampling rates of less than about 10Msample/s, successive-approximation-register (SAR) a/d converters are often the preferred solution. These devices implement a binary search algorithm to converge on the input signal. To process rapidly changing signals, a SAR a/d converter features an input sample and hold (SHA) to keep the signal constant during the conversion cycle. Offering resolutions from 8 to 18bit and sampling rates up to 10Msample/s, SAR converters are widely used in systems that require low noise and low power in a compact package. Typical applications include industrial controls, multichannel data acquisition systems and portable/battery powered instruments. The architecture’s ability to process data at moderate speeds with high accuracy plays a key role in the success of SAR converters in industrial and medical systems. NE: Pipeline and SAR a/d converters continue to hold an important place in the data converter marketplace. But despite their respective attributes, are these architectures devoid of compromise NS: While pipeline a/d converters offer excellent performance over wide bandwidth, and SAR a/d converter s offer low noise and low power, no a/d converter architecture to date has offered an ideal combination of these performance parameters. Yet a growing number of emerging applications in mobile infrastructure, medical, video, instrumentation, test and measurement now demand a/d converters that can deliver a combination of these characteristics. For example, medical applications, such as MRI systems, demand ever higher resolution to deliver more accurate patient diagnostic results. In addition, low power characteristics have become increasingly important in every application. The CTSD architecture is emerging to bridge this performance gap. This new technology incorporates fundamental principles of oversampling and noise shaping, along with an innovative continuous time loop filter architecture to achieve low noise and wide bandwidths. This new architectural approach differs from traditional pipeline or SAR devices in several important ways. A CTSD a/d converter uses continuous time integrators, rather than discrete time integrators or circuits. Additionally, the sampling operation of the CTSD converter occurs at the output of the loop filter in the quantiser, rather than at the a/d converter’s input. Finally, unlike a pipeline or SAR that has evenly distributed quantisation noise, the loop filter in a CTSD a/d converter pushes the in band quantisation noise out of band. These characteristics give the CTSD extremely low noise and wide bandwidth performance, with the added benefits of relaxed filtering at the converter’s input. Using this new architecture, Analog Devices is developing a/d converters that offer up to 10MHz of bandwidth with 86dB dynamic range, along with a 15dB noise figure. The features inherent in the CTSD architecture allow designers to significantly reduce or completely eliminate the need for baseband filters, driver amplifiers and automatic gain control commonly used in conventional signal chains. Moreover, by integrating programmable bandwidth decimation filters, a sample rate converter and clock multiplier on chip, these new devices deliver a simpler signal chain and significant system cost savings. Together, these advantages will allow system designers using CTSD a/d converters to build a new signal chain that delivers dramatic performance advantages to an array of applications in wireless infrastructure, medical imaging and industrial and instrumentation markets. The rapidly escalating performance requirements of today’s end applications, from wireless communications and industrial to instrumentation and consumer, pose a major challenge to system designers selecting data conversion devices. Clearly the well defined performance advantages of the pipeline and SAR architectures will continue to drive a/d converter selection in many applications. However, CTSD technology – with its ability to bridge the performance gap between the two primary data converter architectures – opens the door to a new generation of higher performance and lower cost end solutions.