AMD’s T2 Telco Accelerator Card provides a high performance, low latency, and power efficient platform for 5G O-DU deployments. Through its work with AMD, AccelerComm IP delivers a complete pre and post processing wrapper and subsystem that completes the 5G NR 3GPP chain when using AMD Soft-Decision-FEC LDPC Encoder and Decoder Cores.
AMD is currently working on several trials around the world using the T2 Accelerator Card with AccelerComm IP to improve the cost per bit of an O-RAN system. It allows offloading of the heaviest processing components which is commonly accepted to be LDPC forward error correction, and the combination of AMD 4th-generation EPYC processors and the T2 Accelerator Card using standardised interfaces enables greater flexibility and supports more cell sites per system.
“Delivering efficient 5G networks with the best performance requires tight collaboration between all partners to deliver the promise of Open RAN,” said Will Brown Director, Product Manager at AccelerComm.
Commenting Mike Wissolik, Director of Product Marketing, Data Center and Communications Group, AMD, added,: “Our collaboration delivers on our joint customers’ demands for increased choice of high-performance processing and accelerator technologies. AMD 4th-generation EPYC processors provide up to 64 cores within the challenging telco power budget, enhancing the efficiency of Cloud RAN solutions when combined with our T2 Telco Accelerator Card.”
