This all in one solution supports tests of PCIe 5.0 electrical characteristics, physical-layer protocol analysis, and transmitter/receiver and Link Equalization Training (LEQ) tests to facilitate efficient development of high-speed ICs, devices, and networks used in emerging environments, including 5G.
This test solution can be quickly configured to support required PCIe 5.0 specifications and supports automated transmitter test, receiver jitter tolerance test, and Tx/Rx LEQ compliance test items.
It incorporates waveform-calibration automation software with analysis function using event trigger and high-speed calibration between the MP1900A BERT and DPO70000SX oscilloscope to reduce test times. Cost-of-test is lowered as the solution supports PCIe 1.0-5.0 without a hardware upgrade and can upgrade to PCIe 6.0 test capability with a minimum hardware investment.
Anritsu's Signal Quality Analyzer-R MP1900A series is a multi-channel BERT for designing and testing next-generation network interfaces, such as 200G/400G/800G Ethernet, as well as high-speed bus interfaces, including PCI Express 4.0/5.0, USB3.2, USB4, and Thunderbolt. It has a built-in pulse pattern generator (PPG) that produces best-in-class high-quality waveforms (115 fs low intrinsic jitter), as well as a high-sensitivity (15 mV) error detector (ED). A jitter (SJ, RJ, SSC, BUJ) generation source and CM-I/DM-I/white-noise generation source are also integrated into the instrument.
Link Training and Link Training Status State Machine (LTSSM) analysis functions support various applications, including compliance tests, margin tests, and troubleshooting.
With functions for evaluating PAM4 of optical modules, SERDES and other technologies used by data-centre 200G/400G/800G Ethernet systems, the MP1900A BERT also evaluates PCIe 6.0 (PAM4 32 Gbaud) devices under development to ensure compliance with the latest PCI-SIG standard.
The Tektronix DPO70000SX series 70 GHz Real-time Oscilloscope is linked with the Anritsu Signal Quality Analyzer-R MP1900A BERT as an automated PCIe Gen5 (32 GT/s) Base & CEM transceiver solution. New receiver test automation software uses an optimisation algorithm to correct 32 GT/s and 16 GT/s stressed-eye waveforms to shorten test times using the leading SigTest Phoenix test tool and fast parallel processing. Moreover, support for multiple form factors (M.2 and U.2) and clocking architectures (CC, SRNS, SRIS) supports A/D range optimisation and low-noise PCIe Gen5 Base specification 32 GT/s uncorrelated jitter and pulse-width jitter measurements.
