Applied Materials unveils atomic scale manufacturing technology

According to the technology specialist, the Applied Centura integrated gate stack system is the only tool available that can process the entire high k multilayer stack in a single vacuum environment. This preserves the integrity of its critical film interfaces and the capability is vital to maximising transistor speed and minimising power consumption in microprocessor and graphics chips. As logic chips scale down to the 22nm node and beyond, the heart of the transistor gate structure, its dielectric film stack, is becoming so thin that it must be atomically engineered. In a bid to address this, Applied's integrated gate stack system features the company's advanced atomic layer deposition (ALD) technology, which builds ultra thin, hafnium based layers less than 2nm in thickness, a fraction of a monolayer at a time. According to Applied Materials, this enables 'unmatched uniformity' across the wafer. As these films become thinner, the interfaces between adjacent layers become more crucial. The new system is designed to fabricate the entire gate dielectric gate stack - involving typically four process steps - entirely under vacuum. This unique approach is said to prevent contamination of the interfaces from exposure to ambient air which can degrade transistor performance. Applied's researchers found that eliminating air exposure during processing offers a significant performance boost: mobility in the transistor can improve by up to 10% and switching voltage variability between transistors can be reduced by up to 40%, enabling the manufacture of faster, higher value chips. "Tomorrow's nanoscale transistors require incredible precision because films just a few atoms thick will determine device performance," said Steve Ghanayem, group vice president and general manager of the Metal Deposition, Front End and ALD Products division at Applied Materials. "By combining multiple adjacent processing steps on our world class Centura platform, we can simplify customers' process flows and help them achieve high production yields of their next generation logic chips." "There is a tremendous increase in chip complexity as we move to the 20nm era and one of the biggest changes is at the transistor level where we are seeing a complete redesign of this important building block for electronic devices. Our customers saw the benefit of Applied's metal gate stack solution and worked with us on the same integrated approach for the dielectric gate stack," said Dr Randhir Thakur, executive vice president and general manager of the Silicon Systems Group at Applied Materials. "The new Centura integrated gate stack system is the latest of several innovative systems Applied has launched in recent months, all designed to enable our customers to transition their cutting edge transistor designs from the lab to high volume manufacturing."