The devices use the company's patented Subthreshold Power Optimized Technology (SPOT) platform to run transistors at subthreshold voltages of less than 0.5V.
Mike Salas, vp of marketing, noted the concept of subthreshold processing has been around since the 1970s. "Then, designs were hand crafted, with very few transistors. It wasn't until 2005 that people started to see if there were ways to commercialise the approach when using millions of transistors."
SPOT uses the leakage current of 'off' transistors to compute in both digital and analogue domains. The technology, which uses a standard CMOS process, is said to have overcome such challenges as noise susceptibility, temperature sensitivity and process drift.
"Instead of using 1.8V, for example," said Salas, "we toggle down to 0.5V. Because energy is proportional to V2, we get a big improvement in power. Adaptive circuitry that sits on the silicon deals with issues in the analogue and digital domains, such as extracting the signal from noise."
Apollo users can optimise the performance of active and sleep modes at the same time, said Salas. "With other MCUs, you have to choose one or the other. Sleep mode can be optimised using an older process node, but that is at the expense of dynamic power. Or you could use a newer technology, but that has higher leakage."
Because of the reduction in power consumption, it becomes feasible to integrate a Cortex-M4F core, rather than the Cortex-M0+ found in other low power MCUs. This is said to make the part attractive for use in wearable electronics.
The Apollo MCUs run at up to 24MHz – the 'sweet spot', according to Salas – and are available with up to 512kbyte of flash and 64kbyte of RAM. Alongside I2C/SPI ports and a UART, resources include a 10bit, 13 channel A/D converter running at 1Msample/s and a temperature sensor with an accuracy of ±2ºC. Two packaging options are available – a 64pin BGA measuring 4.5 x 4.5mm and a 42pin CSP measuring 2.4 x 2.77mm.
