But it’s not just about pushing MCUs further down the Moore’s Law curve; we are beginning to see the start of a move which could see flash memory ousted in favour of emerging non volatile technologies.
Geoff Lees, general manager of NXP’s MCU business, was one of the first to point to the potential of 28nm processes. Speaking to New Electronics in January 2014, Lees said: “What were low cost devices need to have more RAM, more resources, but we can’t increase the power budget or the price. That is pushing us to move geometries such as 40nm and 28nm more quickly than we would have expected.”
Two years on, Lees remains convinced of the benefits of smaller geometries as well as the potential of FD-SOI technology. “What’s exciting about FD-SOI,” he said at February’s Embedded World, “is leakage. I can see it dropping to less than 1pA/bit.”
Lees also sees a time when MCUs will not feature flash. “At 40nm, we could put 17.5Mbyte of SRAM on a chip and I think we could do 8Mbyte at a reasonable power level. An increasing number of customers want more SRAM, rather than more flash, and it’s possible to imagine a system which doesn’t need external SDRAM.”
NXP is also likely to take advantage of technologies such as MRAM. “Foundries are looking to bring up MRAM,” Lees pointed out, “and we need to take advantage of what they can offer. The good thing about MRAM is that it doesn’t get to the gate level, so it doesn’t change the materials; something that was disruptive in the past.
“Non volatile memory can be used for program memory and as a secure memory. If data is distributed, you need more security and more storage, but customers don’t always want to pay for it, so 28nm is good for this. Even at 40nm, there’s a finite cost of adding logic; at 28nm, we can add more security without increasing power consumption or cost.”
Looking to the future, Lees concluded: “It would be exciting to see what could be done if FD-SOI went to 14nm.”
Reza Kazerounian, general manager of Atmel’s MCU group, said: “Industry has been looking at how to use non volatile memory and technologies have appeared – FRAM, for example. But none has made it to the mainstream because the applications are not there to justify it.”
But he conceded that, at some time in the future, non volatile RAM may be available at a cost and power level that will force flash out. “That point is probably more than five years off,” he said.
Maurizio Skerlj, senior director of industrial MCUs with Infineon, was equally sceptical. “There have been a lot of promises,” he commented, “but it requires a big investment and a big market. Current technology has been proved to last and, by the time you get economies of scale with non volatile memory, existing technologies will have improved.
“We’re always looking to see how non volatile and flash technologies can solve our customer’s needs. It’s an interesting process, but it might not bear fruit.”
Neither Kazounian or Skerlj share Lees’ enthusiasm for the leading edge, however. Kazounian said: “MCUs are difficult; they have digital, analogue and memory. It’s better to stay on older technology and so we use the best fit for the product.”
“65nm is good for the chips we do,” Skerlj concluded. “Other nodes won’t bring an advantage for some time.”
