Codasip said that it has continually invested in processor verification to underpin the company’s ability to deliver high quality RISC-V processor IPs.
Siemens EDA’s OneSpin tools provide an advanced and robust verification platform that is able to tackle critical IC integrity issues. OneSpin’s formal verification tools for automotive and other high-integrity processor applications verify the implementation with minimal set up and runtime.
Commenting Neil Hand, strategy director for the IC Design Verification division of Siemens EDA, said, “We are pleased to collaborate with Codasip to help ensure the high quality of their RISC-V Processor IP, as well as to establish optimised solutions for our mutual customers. The world-class technology of our OneSpin formal verification tools including the OneSpin RISC-V verification solution, together with Codasip’s innovative RISC-V IP, is key for IC designers to deliver high-quality products to market quickly.”
Rupert Baines, CMO, Codasip, added, “The poor verification of some RISC-V IP is frankly shocking. Developers have legitimate concerns about the quality of RISC-V IP that’s holding back its adoption. Higher quality and formally proven RISC-V IP will help it to cross the chasm and massively increase its adoption.”
