Industry’s lowest power consumption chipset?

The company says this has been achieved by employing a new baseband processing architecture. According to Panasonic, the new chipset will enable stable interactive communication between various kinds of devices supporting the specification developed by the WiGig Alliance. Previously, the electronics giant had developed fundamental cmos circuit technologies for 60GHz transceiver and modem signal processing circuits. Now an additional radio packet processing block has been integrated as a key block of the chipset. This is said to play a 'significant' role in accelerating the realisation of simple to use hd video data sharing/streaming applications for mobile devices. This chipset has been designed to embed into mobile devices, such as smartphones, which require less than 1W power consumption. The technology enables the transfer 30 minute long compressed hd video content to mobile devices within 10s. It also allows the streaming of latency free hd video directly from a mobile device onto a large screen tv with real time performance. According to Panasonic, it surpasses any of the existing technologies today. The newly developed chipset consists of a 60GHz transceiver LSI and a baseband processing LSI with Media Access Control (MAC) packet processing capability. Even when operating at a high data rate of 2.5Gb/s, the chipset is capable of achieving less than 1W of power consumption. Panasonic has halved the size of its latest generation transceiver LSI, while supporting 9GHz bandwidth which is allocated as unlicensed spectrum in Japan and Europe in the 60GHz frequency band. The chipset incorporates low power consumption MAC packet processing technology that employs optimum control between general purpose processor and additional high speed control circuits. This is designed to keep processor clock frequency low, thereby achieving less than 1W power consumption performance. A new high accuracy coil shaped circuit topology has been integrated in a bid to overcome the limitation of transistor separation distance requirements for 60GHz carrier frequency.