'Inexact’ chip offers improved efficiency

The prototype device, developed by a team from Rice University in the US, Singapore's Nanyang Technological University, Switzerland's Center for Electronics and Microtechnology and the University of California, Berkeley, is designed to improve power and resource efficiency by allowing for occasional errors. "The concept is deceptively simple," noted project leader Krishna Palem. "Slash power use by allowing processing components — like hardware for adding and multiplying numbers — to make a few mistakes. By cleverly managing the probability of errors and limiting which calculations produce errors, we've found they can simultaneously cut energy demands and dramatically boost performance." One example of the researchers inexact design approach is 'pruning' ¬¬, a technique which involved trimming away some of the rarely used portions of digital circuits on a microchip. Another innovation, 'confined voltage scaling', trades some performance gains by taking advantage of improvements in processing speed to further cut power demands. In their initial simulated tests in 2011, the researchers showed that pruning some sections of traditionally designed microchips could boost performance in three ways: The pruned chips were twice as fast, used half as much energy and were half the size. In the new study, the team delved deeper and implemented their ideas in the processing elements on a prototype silicon chip. "In the latest tests, we showed that pruning could cut energy demands by 3.5 times with chips that deviated from the correct value by an average of 0.25%," said Palem. "When we factored in size and speed gains, these chips were 7.5x more efficient than regular chips. Chips that got wrong answers with a larger deviation of about 8% were up to 15x more efficient." Likely applications for the pruning technology are expected to be in application specific processors, such as special purpose embedded microchips like those used in hearing aids, cameras and other electronic devices. The first devices to contain the chips are expected by 2013.