With Liberate MX Trio Characterization, Arm has been able to achieve accuracy and capacity requirements and reduced memory liberty variation format (LVF) characterisation validation runtime by 7X when compared with brute-force Monte Carlo simulation.
Liberate MX Trio Characterisation is a library characterisation solution that has been designed for large, advanced-node memory designs, and has enabled the Arm engineering team to perform characterisation validation of its embedded memory instances and compilers efficiently and accurately.
Unlike traditional solutions that require trade-offs between runtime and accuracy, Liberate MX Trio Characterization provided Arm with automated and simulation-based dynamic partitioning to reduce runtime, increase capacity and maintain SPICE-level accuracy.
In addition, the Liberate MX Trio Characterisation’s probing capabilities helped Arm identify the most critical timing arcs and reduce the manual effort associated with characterisation path selection.
Simulations on the full RC netlist covering a complete vector set let Arm identify accurate worst-case paths and maintain SPICE-level accuracy.
According to Arm by moving from its previous brute-force Monte Carlo simulation methodology to the Liberate MX Trio Characterisation variation LVF analysis methodology saved it weeks of validation time through the solution’s automated and less error-prone methodology.
“Arm has been leveraging the Liberate Trio Characterisation Suite for standard cell characterisation, so it was an easy choice for us to broaden our deployment with Liberate MX Trio Characterisation to address our evolving LVF memory characterisation needs,” said Philippe Moyer, VP Design Enablement, Physical Design Group, Arm. “By incorporating Liberate MX Trio Characterisation into our methodology, we are improving accuracy, capacity and meeting time-to-market goals with the delivery of our embedded memory instances and compilers.”
“Memory characterisation can have a significant impact on signoff accuracy, and Arm was looking for a reliable solution for its embedded memory IP that would help them achieve their accuracy requirements while speeding time to market,” said Sharad Mehrotra, VP of R&D, in the Digital & Signoff Group at Cadence. “Arm joined a community of successful, production-proven Liberate MX Trio Characterisation customers, trusting the solution for its memory characterization needs and expanding upon its use of the broader Liberate product portfolio for standard cell power and performance characterisation.”
