Microchip and Acacia enable optimised Terabit-scale data centre interconnect systems

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Microchip Technology has worked with Acacia to demonstrate the fourth generation of interoperability between Microchip’s META-DX2 Ethernet PHY family and Acacia’s Coherent Interconnect Module 8 (CIM 8).

Credit: Microchip

With the latest data centre architectures and increased traffic driving higher bandwidth requirements between data centres, system developers are having to streamline the development of a new generation of 1.2 Tbps (1.2T) transport solutions across a wide range of client configurations.

This requires terabit-scale Ethernet PHY devices and coherent optical modules that are able to interoperate with each other in Data Centre Interconnect (DCI) and metro transport networks.

The two companies’ interoperable devices have been designed to enable low-power, bandwidth-optimised, scalable solutions for pluggable optics in DCI and transport networks and deliver three key benefits as they jointly enable high-capacity, multi-rate muxponders for optical transport platforms:

Optimised DCI bandwidth: The META-DX2 family, through its META-DX2+ PHY, uses its Lambda Splitting feature to split 400 GbE or 800 GbE clients across multiple wavelengths driven by the CIM8 modules. This maximises the capacity between data centres in rate configurations such as 3x800 GbE over 2x1.2 Tbps waves or 5x400 GbE over 2x1.0 Tbps waves.

Reduced design risk: Microchip and Acacia have jointly verified successful SerDes interoperation at up to 112G per lane for Ethernet and OTN clients, which reduces design validation and system qualification requirements.

Better support for full bandwidth, multi-rate operation: The META-DX2+ crosspoint and gearbox functions enable 100 GbE to 800 GbE client modules to connect with full bandwidth to CIM8 modules.

“This interoperability extends a long-established partnership with Acacia to help accelerate and optimise the build-out of cloud computing and AI-ready optical networks while reducing development risk for our customers,” explained Maher Fahmi, vice president for Microchip’s communications business unit. “Our META-DX2 is the first solution of its kind to integrate 1.6T of encryption, port aggregation and Lambda Splitting into the most compact 112G PAM4 device in the market.”

“With Acacia’s CIM 8 coherent modules verified to interoperate with Microchip’s META-DX2 devices, we see this as a robust solution that reduces system time-to-market,” added Markus Weber, senior director DSP product line management of Acacia. “The compact size and power efficiency of our CIM 8 coherent modules were designed to help network operators deploy and scale capacity of high-bandwidth DWDM connectivity between data centres and throughout transport networks.”