Microchip expands 64-bit portfolio to address intelligent edge systems

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With the global edge computing market expected to grow by more than 30 percent in the next five years there is likely to be an increased demand for reliable, embedded solutions for mission-critical applications and systems.

Credit: Microchip Technology

To meet that demand, Microchip Technology has released the PIC64HX family of microprocessors (MPUs) which unlike traditional MPUs, has been purpose built to address the specific requirements of intelligent edge designs.

The PIC64HX is a high-performance, multicore 64-bit RISC-V MPU that’s capable of advanced Artificial Intelligence and Machine Learning (AI/ML) processing and has been designed with integrated Time-Sensitive Networking (TSN) Ethernet connectivity and post-quantum-enabled, defence-grade security.

According to Microchip, these MPUs deliver comprehensive fault tolerance, resiliency, scalability and power efficiency.

“The PIC64HX MPU is truly groundbreaking in the number of advanced features we are able to provide with a single solution,” claimed Maher Fahmi, corporate vice president of Microchip’s communications business unit. “And, integrating TSN Ethernet switching into the MPU helps developers bring standards-based networking connectivity and compute together to simplify system designs, reduce system costs and accelerate time to market.”

The integrated Ethernet switch includes a TSN feature set with support for important emerging standards: IEEE P802.1DP TSN for Aerospace Onboard Ethernet Communications, IEEE P802.1DG TSN Profile for Automotive In-Vehicle Ethernet Communications and IEEE/IEC 60802 TSN Profile for Industrial Automation.

Eight 64-bit RISC-V CPU cores - SiFive Intelligence X280 - with vector extensions help enable high-performance compute for mixed-criticality systems, virtualization and vector processing to accelerate AI workloads. The PIC64HX MPU also allows system developers to deploy the cores in multiple ways to enable SMP, AMP or dual-core lockstep operations. WorldGuard hardware architecture support is provided to enable hardware-based isolation and partitioning.

“Next-generation aircraft require a new generation of processors for mission-critical applications such as flight control, cockpit display, cabin networking and engine control. The OHPERA Consortium views RISC-V technology as an essential component of the future of safe and sustainable aircraft,” said Christophe Vlacich, OHPERA technical Leader. The OHPERA Consortium is composed of aerospace companies with the mutual goal of evaluating new technologies for next-generation aircraft.  “We are pleased to see the upcoming availability of commercial products like Microchip’s PIC64HX MPU with the compute performance, partitioning, connectivity and security needed to shape the future of aviation.”

The arrival of quantum computers is expected to pose an existential threat as it will make current security measures ineffective. As a result, government agencies and enterprises worldwide are beginning to call for the inclusion of post-quantum cryptography in any critical infrastructure.

Addressing this, the PIC64HX is one of the first MPUs on the market to support comprehensive defence-grade security including the recently NIST-standardised FIPS 203 (ML-KEM) and FIPS 204 (ML-DSA) post-quantum cryptographic algorithms. 

The PIC64HX MPU is supported by a comprehensive package of tools, libraries, drivers and boot firmware. Multiple open-source, commercial and real-time operating systems are supported including Linux and RTEMS, as well as hypervisors such as Xen.

PIC64HX MPUs also leverage Microchip’s extensive Mi-V ecosystem of tools and design resources to support its RISC-V initiatives. Microchip offers the Curiosity Ultra+ PIC64HX evaluation kit and is partnering with single-board computer partners.

PIC64HX MPU samples will be available to Microchip’s early access partners in 2025.