“Today’s release of MIPI I3C is an important milestone for MIPI Alliance and the developer community because it brings together multiple sensor interface approaches around a unifying specification that provides conveniences and system-level benefits for many applications,” said Joel Huloux, MIPI Alliance chairman.
According to the Alliance, MIPI I3C makes it easier to integrate sensors in small space-constrained form factors, alleviates interface fragmentation, helps minimise pin count, and controls system-wide energy consumption.
The specification is said to give developers a greater choice of design options, reduces system-level implementation costs, and helps shorten time-to-market for new applications.
MIPI I3C specifies a chip-to-chip interface that can connect all sensors in a device to the application processor. It is implemented on a standard CMOS I/O using two wires. The specification achieves clock rates up to 12.5MHz and provides options for high data rate modes. It is said to use a fraction of the power consumed by I2C while increasing bandwidth by more than an order of magnitude.
“With MIPI I3C, most types of I2C devices can coexist with I3C devices on the same bus, enabling vendors to migrate current I2C designs to the new standard,” commented Rick Wietfeldt, chair of the MIPI Alliance Technical Steering Group. “Likewise, newly designed MIPI I3C devices can work on existing legacy I2C buses.”
