The RZ/Five employs the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA) and augments Renesas’ previously available Arm CPU core–based MPUs, expanding customer options and providing more flexibility in product development.
“RZ/Five is the first general-purpose MPU on the market to be built around a 64-bit RISC-V core from Andes,” said Frankwell Lin, Chairman and CEO at Andes Technology. “Andes has collaborated with Renesas first on the 32-bit RISC-V core and now on the 64-bit AX45MP, and I anticipate that this development will lead to the early adoption of customers’ devices in the global market built with Andes’ advanced RISC-V processor families.”
Demand is increasing for IoT endpoint devices, such as gateways for solar inverters or home security systems, to collect sensor data and connect to servers or to the cloud. To address this, RZ/Five is optimised to provide the performance and functions required by IoT endpoint devices. Its maximum operating frequency is 1 GHz and peripheral functions include support for multiple interfaces, such as two Gigabit Ethernet channels, two USB 2.0 channels, and two CAN channels, as well as dual A/D converter modules. Support is also provided for connecting external DDR memory with error checking and correction (ECC) and security functions.
As with the RZ/G Series, a Verified Linux Package (VLP) featuring Civil Infrastructure Platform (CIP) Linux, an industrial-grade Linux offering long-term maintenance support for more than 10 years, is available. This makes the RZ/Five series suitable for corporate infrastructure and industrial applications that require a high level of reliability and extended service life. It also allows users to dramatically reduce future Linux maintenance costs.
The peripheral functions and package of RZ/Five are compatible with those of the Arm core–based RZ/G2UL, allowing for easy reuse of proven designs. The RZ/Five also comes in a smaller, compact package to address less complex designs more efficiently. As an evaluation environment, an RZ SMARC Evaluation Board Kit will be offered with a module board conforming to the SMARC 2.1 standard, equivalent to the currently available environment for the RZ/G Series. This kit allows switching and evaluating between an RZ/Five CPU module and an RZ/G2UL CPU module, enabling easy evaluation and shortening product development cycles.
Renesas is also providing a complete system solution for the RZ/Five CPU module that will include Renesas’ DA9062 power management IC, 5P35023 programmable clock generator, AT25QL128A flash memory and SLG46538 GreenPAK IC implementing peripheral functions such as system reset.
These devices work together in Winning Combinations, such as SMARC System for Single Core Cortex-A55 MPU, that can be used as reference designs to reduce product development time.
