Researchers unveil unique nanoscale manufacturing technique
3 mins read
A new method of manufacturing nanoscale devices has been developed by researchers at Massachusetts Institute of Technology. According to teams from MIT's Research Laboratory of Electronics and Singapore's Engineering Agency for Science, Technology and Research, the new technique could produce chip features just 10nm across.
The researchers used existing methods to deposit narrow pillars of plastic on a chip's surface; then they cause the pillars to collapse in predetermined directions, covering the chip with intricate patterns.
Traditionally, the manufacture of such devices — the transistors in computer chips, the optics in communications chips, the mechanical systems in biosensors and in microfluidic and micromirror chips — still depends overwhelmingly on a technique known as photolithography. However, the size of the devices that photolithography can produce is limited by the very wavelength of light.
Project leader, Karl Berggren, the Emanuel E Landsman (1958) Associate Professor of Electrical Engineering and Computer Science, said: "Collapse of structures is one of the major problems that lithography down at the 10nm level will face. Structurally, these things are not as rigid at that length scale. It's more like trying to get a hair to stand up. It just wants to flop over. If we can't end up beating it, maybe we can use it."
With photolithography, chips are built up in layers and, after each layer is deposited, it's covered with a light sensitive material called a resist. Light shining through an intricately patterned stencil — called a mask — exposes parts of the resist but not others, much the way light shining through a photographic negative exposes photo paper. The exposed parts of the resist harden, and the rest is removed. The part of the chip unprotected by the resist is then etched away, usually by an acid or plasma; the remaining resist is removed; and the whole process is repeated.
The size of the features etched into the chip is constrained, however, by the wavelength of light used, and chipmakers are already pushing against the limits of visible light. One possible alternative is using narrowly focused beams of electrons — or e-beams — to expose the resist. But e-beams don't expose the entire chip at once, the way light does; instead, they have to scan across the surface of the chip a row at a time. That makes e-beam lithography much less efficient than photolithography.
Etching a pillar into the resist, on the other hand, requires focusing an e-beam on only a single spot. Scattering sparse pillars across the chip and allowing them to collapse into more complex patterns could thus increase the efficiency of e-beam lithography.
The layer of resist deposited in e-beam lithography is so thin that, after the unexposed resist has been washed away, the fluid that naturally remains behind is enough to submerge the pillars. As the fluid evaporates and the pillars emerge, the surface tension of the fluid remaining between the pillars causes them to collapse.
In the first of the two papers, published n the journal Nano Letters, Berggren and Huigao Duan, a visiting student from Lanzhou University in China, showed that when two pillars are very close to each other, they will collapse toward each other. In a follow-up paper, appearing in the nanotech journal Small, Berggren, Duan and Joel Yang showed that by controlling the shape of isolated pillars, they can get them to collapse in whatever direction they choose.
Slightly flattening one side of the pillar caused it to collapse in the opposite direction, although the researchers had no idea why. When the team hatched the idea of asymmetric pillars, they expected them to collapse toward the flat side. In experiments, the partially flattened pillars would collapse in the intended direction with about 98%. "That's not acceptable from an industrial perspective," Berggren said, "but it's certainly fine as a starting point in an engineering demonstration."
At the moment, the technique has limitations; if the pillars are spaced too close together, they collapse toward each other, no matter what shape they are. That restricts the range of patterns that the technique can produce on chips with structures packed tightly together, as they are on computer chips.
However, according to Joanna Aizenberg, the Amy Smith Berylson Professor of Materials Science at Harvard University, there could be a wide range of applications where the technique will prove useful. "It can open the way to create structures that were just not possible before," Aizenberg said. "They're not in manufacturing yet because nobody knew how to make them." Aizenberg's group has been using the controlled collapse of structures on the micrometre scale to produce materials with novel optical properties. "Particularly interesting applications would come from this sub 100nm scale," she said. "It's a really amazing level of control of the nanostructure assembly that Karl's group has achieved."