Shrinking roll out

TSMC expects to complete its roll out of 45nm technology in just one year, once the processes enter production in September. Highlighting the speed, Chuck Byers, director of worldwide brand marketing, said the 90nm roll out took 30 months, whilst 65nm took 18 months. “With this node,” he claimed, “we’ll be rolling out 15 different advanced processes within a year.” In Byer’s opinion, this accelerated roll out program is being driven solely by demand. “The real picture is the shrinking time to market for our customers.” The first process to ‘go live’ will be the CL45LP low power variant, followed closely by the CLN45LP embedded dram process. “This hasn’t happened before,” Byers contended, “and is clearly driven by demand for SoCs.” These processes will be followed by CMN45LP mixed signal and rf option. All processes will use 193nm immersion lithography – ‘not a risk’, said Byers – with an extreme low K intermetal dielectric. Although the processes will initially use a conventional gate dielectric, they will ‘go metal’ at a later date. Interest is said to be growing in TSMC’s 45nm CyberShuttle process. The multiproject wafer approach will be run in June and December on the low power and mixed signal and rf processes, and in September on low power and embedded dram.