For the last 20 years, chip manufacturers have been using the same chip design techniques in which extensive testing is required after each design step. The newly developed functional programming language should, say the researchers, make it possible to prove, in advance, that a design transformation is a 100% error free.
"While a software developer can fix a programming error by developing and distributing a patch, a single flaw in chip design means that all products containing the chip need to be recalled," said doctoral candidate Christiaan Baaij.
"Clearly, the design process requires extensive and repeated testing. Such testing is expensive, but is still absolutely necessary. A company like NVidia nowadays incurs more than $1billion in design expenses annually."
Functional programming languages are said to allow the user to formally prove the correctness of design transformations. Because functional verification can prove that transformations do not alter the chip's behaviour, it is not necessary to verify and reverify each step of the design process. In turn, says Baaij, this means the complexity – and the cost – of chip design can be managed more readily.
One important element of this research involves the C?aSH compiler, which transforms hardware descriptions written in the Haskell functional language into a lower level description. Standard software can then create a chip from this description. Baaij's work concerns the development of this compiler, allowing for the automatic generation of the hardware from an abstract description.
