‘World’s first’ no offset I2C bus buffers announced by NXP

The devices use the no offset scoreboard method to decide signal direction, rather than using a directional pin and relying on offset voltages to control direction and prevent bus latch up. They are interoperable with static offset or incremental bus buffers, regardless of which other devices are on the bus. In addition, NXP has introduced the PCA9646 – said to be the industry's first fully buffered four channel switch with no offset ports. All devices work to 1MHz, and the PCA9605 and PCA9646 support Fast mode Plus (Fm+). According to the company, this has 10x the normal I2C bus drive, allowing longer I2C buses or placement of more devices on the bus. "By enabling designers to drive robust I2C bus signals over long distances through interconnects in electrically noisy environments, our no offset bus buffers and switch open up exciting new possibilities for the I2C bus in enterprise computing, industrial automation and automotive applications," said Steve Blozis, international product marketing manager, Interface business line, NXP. According to Blozis, the Fm+ no offset bus buffers and switch allow buses to be broken into segments or branches to isolate the bus capacitance into lower capacitive segments meeting I2C bus specifications. As such, NXP says designers can now consider running I2C communications over long distances, while using inexpensive commodity cabling such as CAT5 in enterprise computing applications such as servers and mass storage systems.