The devices provide 200fsec of additive jitter, while offering flexibility to design engineers. According to IDT, the fanout buffers enable one device to be deployed across multiple systems.
The outputs allow engineers to use one device to meet the requirements of systems using multiple signal types, which can translate to reduced costs and space savings. Users can specify the signal type and voltage of each output on the buffer, meaning a single device can, for example, supply LVPECL on one output, LVDS on another, and LVCMOS on a third.
With the IDT 5P11xx family of buffers, clock outputs can be individually programmed as LVDS, LVPECL, HCSL or two LVCMOS outputs per output pair, with a crystal, LVCMOS, or differential input. The chips enable four universal output pairs, as well as a reference LVCMOS output clock. Output frequencies range from 1MHz to 200MHz for LVCMOS and 1MHz to 350MHz for differential outputs. Output voltage can be individually selected as 1.8V, 2.5V or 3.3V for each output pair. The 5P1103 has two universal outputs and an LVCMOS output; the 5P1105 has four universal outputs and an LVCMOS output.
The devices are suited applications including products for high-end consumer, networking, computing, industrial, communications and broadcast video.
