Programmable clock cuts power loss by 60%
1 min read
Exar's XR81112 series of ultra low jitter programmable clocks is said to dissipate 60% less power than competing solutions.
The devices offer output frequencies from 10MHz to 1.5GHz with ultra low phase noise jitter of less than 200fs, making them suitable for demanding communications, audio/video and industrial applications.
Available in a 3 x 3mm QFN-12 package, the clock synthesisers utilise a flexible delta-sigma modulator and a wide ranging VCO in a PLL block optimised for power efficiency.
With a core current consumption of just 20mA, the parts dissipate 60% less power than similar solutions. The PLL can operate from either an input system clock or a crystal, and incorporates both an integer divider and a high resolution (<1Hz) fractional divider for increased flexibility to generate any clock frequency.
Up to four different frequency multiplier settings can be stored, allowing for different application configurations and providing BOM savings compared to multiple synthesisers. The XR81112 is configurable for LVCMOS, LVDS or LVPECL outputs.
