Simultaneous sampling adcs added to portfolio

Each of the two adcs features an independent serial peripheral interface (spi) for host communication, allowing the fastest clock required on each interface to be reduced to 20MHz while supporting the maximum sampling rate. Alternatively, designers can combine the two data streams to use only a single spi port if the sampling rate is slower or if the host's spi interface can operate in excess of 40MHz. This flexible architecture broadens the choice of host microcontrollers or dsps. To further enhance flexibility, the inputs can be configured as either four single ended or two differential channels to allow the same MAX1377/MAX1379/MAX1383 platform to be used for different applications.