The TPS62912 and TPS62913 offer low noise of 20 µVRMS for frequencies ranging from 100 Hz to 100 kHz and ultra-low output-voltage ripple of 10 µVRMS, giving engineers the ability to remove one or more low-dropout regulators (LDOs) from their designs, reduce power losses by up to 76% and save 36% of board space.
Noise in the power supply is a key design challenge in many high-precision test and measurement, medical, aerospace and defence, and wireless infrastructure applications.
A traditional low-noise power-supply architecture includes a DC/DC converter; a low-noise LDO; and an off-chip filter, such as a ferrite bead. By integrating ferrite-bead compensation, the new TPS62912 and TPS62913 use the ferrite bead already present in most systems as an effective filter against high-frequency noise, reducing the power supply output voltage ripple by approximately 30 dB and simplifying the power supply design.
High-precision systems require supply rails with low noise and low ripple to preserve signal accuracy and integrity and the TPS62912 and TPS62913 offer both, along with a power-supply rejection ratio of 65 dB at up to 100 kHz. In addition, this buck converter family has an output-voltage error of less than 1%, which helps ensure tight output-voltage accuracy.
Both converters enable the use of spread-spectrum frequency modulation to further attenuate radio-frequency spurs and allow synchronization to an external clock so engineers can easily meet their signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) targets, which are critical in applications such as medical imaging or radar.
With a peak efficiency of 97%, the TPS62912 and TPS62913 allow engineers to design for noise filtering without an LDO, reducing power losses by up to 76% – 1.8 W in analogue front-end (AFE) designs and 1.5 W in designs using a wideband analogue-to-digital converter (ADC). This represents a 20% and 15% increase in efficiency, respectively, when compared to a traditional low-noise power architecture
