Silicon has done well. It has lasted for more than four decades in high volume manufacture. The semiconductor quickly supplanted germanium in the early days of business, mostly thanks to its ability to use its own oxide as an insulator. It took some years to get right but, once the techniques were in place, the shift from bipolar to field effect transistor (FET) could start in earnest. But silicon has started to lose its lustre for process engineers. Problems that used to be hidden in the noise are coming to the fore – and have been for the past ten years.
For years, the shorter you made the gate of a FET, the faster it would switch – this was the era of Dennard scaling, named after IBM fellow Robert Dennard, inventor of the dram and who outlined the way in which device properties would change as they shrank.
Not only would the transistor get faster as it shrank, it would consume less power. The decision to migrate to each successive process as it became available was pretty much a one way bet unless density was not a major concern – as is the case with analogue centric devices. In the mid 1990s, life got even better.
As gate lengths sank to less than 0.5µm, concerns grew over the ability of optical lithography to draw features successfully on the surface of the wafer as the steppers were resolutely stuck with using 248nm ultraviolet light with no realistic prospect of moving to the shorter wavelengths that would suffer far less from diffraction effects. The rise of mask correction techniques made it possible to use diffraction against itself and cancel out the worst of its effects. In fact, it allowed the industry to reduce gate length faster than expected, reaping the benefits of even faster switching and lower power consumption ahead of schedule – all thanks to the effects of Dennard scaling.
Then, early into the first decade of the 21st Century, silicon's inherent problems began to assert themselves. The 130nm generation was the last where it was possible to expect higher performance from a shorter gate. Since then, process engineers have been adding materials to an increasingly complex flow to try to keep silicon on track.
The evolution started with strained silicon. Distorting the crystal lattice in the right way improves the mobility of charge carriers, increasing overall device speed. The type of strain matters. N-channel transistors, where electrons are the majority carriers, benefit from compressive strain, usually imposed by a capping layer that pulls the silicon atoms further apart together than normal. P-channel transistors, which traditionally have been slower to switch because holes have lower overall mobility, see improvements when the crystal lattice is compressed.
This is achieved today by adding germanium to the channel in the form of graded layers of silicon germanium alloy. So successful has the mobility improvement been in the case of p-channel devices that designers have to compensate far less for the slower performance than they did in the past.
Meanwhile, silicon dioxide is gradually giving way to more exotic insulators, based on rare earths such as hafnium. These high-k insulators make it possible to increase the thickness of the insulation at the bottom of the gate that, coupled with a metal rather than polysilicon gate electrode, allow better control over the transistor channel. The thicker insulation reduces the tendency for electrons to tunnel through the gate insulator and leak away. Although this form of leakage has been less troublesome than substrate leakage in the past, gate leakage becomes more critical beyond the 45nm node.
The transition is far from complete. Even at 32nm, high-k metal gate stacks make the most sense for high clock speed circuits. For the frequencies typically used in mobile phones and other portable appliances, silicon dioxide and polysilicon gate stacks still make sense, not least because they do not have to bear the additional processing costs associated with high-k metal-gate stacks.
If mobility is becoming a problem, what could be better than a high mobility material? The Group III and IV elements of the periodic table have provided semiconductor engineers with a solid list of compound semiconductors that have carrier mobilities far higher than those of silicon. The problem is that they are difficult to work with, restricting them to specialised applications such as rf devices. Another possibility is a shift back to germanium – the favoured material of the early 1960s.
A big problem for these materials has been the inability to use them to form a stable oxide on which to build a FET gate stack. Freescale demonstrated in 2005 that it was possible to create gallium based FETs using the element gadolinium in the gate oxide. The development of reliable high-k dielectrics provides new possibilities. The change is not so much in the materials themselves, but in the ability to build stable interfaces between crystals with different compositions. There is no need to find a stable oxide of germanium – you can use something else entirely.
Similarly, the same techniques that paved the way to strained silicon can be applied to III-V materials and germanium so they can be laid down on a standard silicon wafer. The bulk of the wafer might be silicon, but the channel material underneath the gate can be gallium arsenide (GaAs) or, for maximum mobility, indium antimonide (InSb). However, the compatibility between III-V materials and silicon is far worse than between germanium and silicon.
Cracks form readily in III-V layers laid on silicon. So, today's experimental designs use many buffer layers to relieve strain on the most critical layer: the one used as the transistor channel [See Fig 1]. The layer count is a major handicap for the use of III-V channels as each one adds time to processing time and therefore cost.
There is a further potential catch in the use of high-mobility materials in place of silicon: they may not deliver the performance promised by their higher mobility. Researchers at the Massachusetts Institute of Technology (MIT) benchmarked high mobility materials and found that series resistance between the III-V channel and the source and drain contacts can be several times higher than that of silicon.
An evaluation by Thomas Skotnicki and colleagues at STMicroelectronics claimed a higher dielectric constant in most III-V materials and other quantum mechanical effects will limit their actual usefulness in low power circuits, with potentially worse results than with strained silicon. Research at MIT has also indicated problems with parasitics, such as series resistance, could negate the improvement in mobility.
The performance of III-V channels improves with larger transistors and higher power circuits but, without mass market support from designs focused on low power, the critical mass needed to encourage process engineers to overcome the manufacturing challenges of using III-V channels might not emerge. Instead, the focus may shift to three dimensional structures, such as finFETs and silicon nanowires, providing silicon with a longer shelf life – potentially as far in the future as 2020 and beyond.
Silicon's true successor may be just one step away in the periodic table: a shift up one line from element 14 to element 6 – carbon. But this will only happen if researchers can find a way to place the materials precisely on a wafer. In its graphene or nanotube form, carbon is a very effective conductor of electricity.
The key to the high conductivity lies in the bond structure of flat sheets of carbon, such as those found in graphene. The carbon is arranged into interlocked hexagonal rings: it is, in effect, a polymer of the ring shaped molecule benzene. The curious nature of the benzene ring fascinated scientists for more than a century. On paper, the ring should consist of alternating single and double carbon-carbon bonds.
In carbon-carbon bonds, single bonds are formed from electron orbitals that point towards each other when they overlap. The second bond comes from orbitals that are orthogonal to the single bonds and so that they parallel to each other. When they are close enough to overlap, a second bond is formed. This stronger, double bond pulls the two carbon atoms closer together than they would be if joined by a single bond. A ring of alternating single and double bonds should be distorted by this difference in bond lengths.
But centuries ago, scientists realised that benzene is highly symmetric: each bond is the same length. Something else was clearly going on.
The key to the puzzle lay in the way the parallel orbitals can join up all the way around the ring. Rather than being isolated to individual bonds, the electrons 'delocalise' over the entire layer. There is no potential barrier to stop the electrons from moving freely around the ring through these overlapped orbitals. In this layer, the electrons can move as though they are in a metal.
Where chemists talk of delocalised electrons, physicists use the idea of the Dirac cone: a zone where electrons have no effective mass. And graphene is far from being the only material to possess Dirac cones. A new class of materials, termed the topological insulator, has emerged in the past decade. Largely based on metals from the middle of the periodic table, the number of candidate materials for forming new electronic devices is steadily expanding.
In the topological insulator, the core is an insulator but Dirac cones form at the surface, providing a highly conductive layer. One potentially closely linked class of material is the half metal – a metal where electrons can only move freely if they have the right spin state.
Because electron flow depends on spin state, it opens up the possibility of using the core of a material like NiMnSb as an electronic device based on spin states, rather than changes in voltage or current. It is possible to flip spin states ten times faster than it is to switch a conventional charge based transistor, potentially leading very fast, low power devices.
Spin dependent devices already exist, such as magnetoresistive memories. But these often rely on complex sandwiches of materials laid down atomic layer by atomic layer. A half metal, such as nickel manganese antimonide, one of the materials being investigated by Stephen Jenkins at the University of Cambridge, potentially offers simpler manufacturing because the material intrinsically controls the flow of electrons in different spin states. However, these materials are relatively new and, as a result, no device structures have been put forward.
Much greater progress has been made in the development of graphene based transistors, in both performance and manufacturability. Researchers at the University of California at Los Angeles (UCLA) recently demonstrated a transistor made from graphene able to switch at 300GHz. The team, led by Professor Xiangfeng Duan, put a nanowire on top of a graphene layer in an attempt to work around one major problem with all carbon-channel devices: getting them in the right place.
So far, experimental carbon nanotube and graphene transistors have been isolated devices that, in effect, are wired up where the active material falls. Duan's group used a self aligned approach, analogous to those used to form key structures on silicon transistors, to place a nanowires on top of the graphene substrate so that they would act as gates.
There is one further problem with graphene, as pointed out by IBM researchers at the International Electron Device Meeting late last year: the material has practically no bandgap, limiting its use as a semiconductor. IBM proposed using its properties to form very high speed rf analogue transistors, rather than digital devices.
Graphene devices need not behave like conventional transistors, however. Researchers at the University of Texas aim to use the interactions between parallel layers of graphene to form a new kind of transistor that uses the quasiparticles predicted by quantum mechanical theory, rather than electronics.
The so called BISFET relies on the way electrons can assemble themselves into quasiparticles on a graphene sheet. If parallel sheets are brought close enough together, quasiparticles pair up and form a third type of particle: an exciton. Excitons not only flow freely through matter, their distributed nature makes them more resistant to noise effects. And they can be controlled using an electric, much like a conventional FET.
The device's behaviour is not like that of a normal transistor switch: it calls for a more complex three phase clock, rather than the two phase approach used in cmos transistors. But the Texas researchers have gone as far as developing a form of logic that could put the BISFET to use, even if it means a dramatic shift away from well understood cmos principles.
Its big promise is much lower power operation. The switching energy is just 0.01aJ – orders of magnitude below the picojoule energies of today's transistors. The BISFET is not without its manufacturing challenges: interlayer spacing will be crucial and the distances involved are on the order of 1nm.
The last set of useful materials lies in the middle of the periodic table: with oxides of transition metals. A number of these materials are potential candidates for new types of non volatile memory (New Electronics, 11 January 2011), but their complex structures could yield new types of transistor if mixed together. Researchers have shown how dislocations between oxides of different metals can encourage switching behaviour. Rather than treating crystal defects as problematic – process engineers strive to remove them – these materials put the defects to use.
However, the physics behind these interfaces remain poorly understood and their unusual properties have largely been exposed through trial and error so far. As simulations of these crystals improve, it should become easier to predict how different mixtures will behave and point the way to a new generation of semiconducting materials.
In the meantime, silicon is likely to go through a number of life extending treatments. But even when it runs out of steam as an active component, silicon will probably be the substrate for the next generation.
