Engineering publications brought to you by Mark Allen

EDA & Design Software

MIPS selects Imperas Reference Models for RISC-V processor verification

Codasip adopts Imperas for RISC-V processor verification

Imperas announces RISC-V product updates

Outlook 2022: The future of chip design

Siemens extends EDA support for Samsung process technologies

Aldec adds UVM Generator to Riviera-PRO

Codasip expands ecosystem with XtremeEDA

Synopsys buys Concertio

Sondrel develops Performance Verification Environment to fast-track ASIC creation

New TECHNOMET 10.5 inch Portable Enclosures For Half-Width (42HP) Electronics Equipment

IP test silicon for PCI Express 6.0 specification on TSMC's N5 process

Siemens collaborates with TSMC on design tool certifications