Engineering publications brought to you by Mark Allen

ASIC & SoC

Efabless partners with imec in development of custom ICs

Nokia and Finland’s Tampere University join forces to develop 5G chipsets

Renesas selects Andes RISC-V 32-Bit CPU cores

Moortec's in-chip sensing fabric selected for 5G small cells SoC

Efabless expands support for Cloud-based design platform

BrainChip confirms validation of its Akida neural processor

Cadence collaborating with GLOBALFOUNDRIES on 12LP/12LP+ solutions

Codasip Whitepaper - Creating domain-specific processors using custom RISC-V ISA instructions

Kneron KL720 SoC uses a 1Gb LPDDR3 DRAM die from Winbond

Imagination and Packetcraft partner to deliver low energy audio

Microchip looks to leverage RISC-V ISA

Evonetix and Analog Devices collaborate on DNA synthesis platform