So, when chip companies were making, say, 0.35µm devices, the minimum feature size in those chips was 0.35µm. But even then, confusion was developing and an alternative definition was half the distance between cells in a DRAM chip.
Now leading edge companies are making chips on 14nm processes – or say they are. A particular rivalry has developed over recent years between Intel and TSMC, with each keen to point out that its process is better than the other’s.
Whether Intel is upping the stakes or looking to cool the rivalry isn’t clear, but the company’s senior fellow Mark Bohr has issued a call for the industry to revert to a previously used metric – the number of transistors per sq mm of silicon – to determine where each process lies on the Moore’s Law curve. Blaming increasing complexity of semiconductor processes and the variety of designs, he said. “Node names have become a poor indicator of where a process stands on the Moore’s Law curve."
Just to kick things off, Intel has used this formula to determine that devices manufactured on its forthcoming 10nm process will feature 100.8million transistors/mm2. Will other companies respond? Don’t hold your breath.
