Earlier this month Cadence held its annual meeting for design engineers in Munich. In his opening address to the conference, Tom Beckley, the company’s Senior VP and General Manager Custom IC & PCB Group described an industry that was going through, “interesting times.”
Beckley pointed to the increased numbers of sensors, the growth in data and artificial intelligence (AI) as key technology trends.
“No one can seriously doubt the potential of big data to transform. As it plays out it will upend whole industries and bring into question what it is that companies need to do in order to survive and thrive in a world where data and analytics are critical.”
The amount of data that is being generated by platforms and sensors, let alone the billions of smartphones now being used, is massive. With the growth in data centres to handle this data, so there is a need for exceptional compute capabilities in terms of delivering higher bandwidth, faster transmission rates and lower latency.
“All of this is creating a significant inflection point for our industry,” suggested Beckley.
“Data is the new corporate asset and at its heart is AI and the complex algorithms needed to support and develop it. Companies are digitising the entire consumer experience and data is being collected and then used to shape marketing and business strategies, as well as to ensure operational excellence and boost productivity,” Beckley argued.
“This provides the back-drop in which our industry now has to operate,” he continued. “There is a huge opportunity out there for systems development, for new SoCs, systems in package, electromechanical systems and miniaturisation, but engineers need the tools to deliver on these opportunities.
“We have seen this type of wave in innovation before - Intel and microprocessors, or Nvidia and Qualcomm in the mobile space. AI is the next one.”
According to Beckley, while AI is giving rise to a growing number of new start- ups, big players such as Amazon, Facebook and Huawei are also entering the market.
“No one can seriously doubt the potential of big data to transform. As it plays out it will upend whole industries and bring into question what it is that companies need to do in order to survive and thrive.” Tom Beckley |
“At the Consumer Electronics Show (CES) earlier this year, Huawei unveiled a new AI chip with more than 20 billion transistors. Based on the 7nm node and with an ARM v8 architecture it is dedicated to AI processing. We can expect to see rapid growth in this space in the coming years.”
The demand for these kinds of devices is also being driven by the advent of 5G which will help to accelerate the demand for both Big Data and AI.
“5G is going to be 40 times faster than 4G and will impact every aspect of our lives, and that will give rise to new technologies whether that’s RF and mmWave, innovative new antennas or better power and thermal management – as we look to miniaturise components so we need to worry more about reliability.
“These technologies will need to be combined – unified – everything will be included in a package but with a smaller footprint and they will be deployed everywhere, especially as we enter a hyper-connected world.
“Give it a few years, but the changes will be profound.”
Perfect storm
Obviously adding to these trends is the slowing down of Moore’s Law.
“It’s the perfect storm for electronics. We like to attribute our advances to our own ‘skills’ or ‘knowledge’ but it’s a lot easier when you are riding a tidal wave, which is what Moore’s Law has been.”
According to Beckley, the industry has assumed that when you go from one geometry to the next finer node, so you will achieve automatic performance gains.
“Chip designers have tried to leverage improvements in process technology to get performance improvements for many years now,” said Beckley. “Each time we pushed to a new node, doubling the number of transistors, we were able to deliver higher performance, lower power and cost, as well as smaller devices.
“But today, the rules are changing – after decades. It is getting more expensive, and the physics challenges will, in time, overwhelm the scalability of CMOS.”
Today, at 28nm and below, SoC performance tends to be dictated more by interconnects (metal system) than transistor performance. Mainstream CPUs for PCs/laptops have hovered between 2GHz and 3GHz because Moore’s law scaling can no longer give the “performance gains” in terms of clock speed.
Third generation JasperGold Formal Verification Platform from Cadence |
As a result, something else has to be done to get more performance than relying on process migration to the next finer node – so CPU designs have moved from single core to dual core, to quad core.
Running devices at a high clock rate, however, can also cause problems with heat (thermal issues) and high packaging and cooling costs.
So as we enter this new world of ‘More than Moore’, Beckley made the point that there would need to be increased focus on analogue.
“We’ve not seen the developments that we’ve achieved in the digital world when it comes to analogue and in this world, I believe, we will need to see a greater focus on optimising the physical in terms of higher bandwidth memory and processing power, leveraging both wafer stacking and modules.”
For the design analysis and verification of these increasingly complex systems, Cadence has introduced a new approach which it calls ‘Intelligent System Design’.
According to Beckley this is the base on which the company’s core platforms for EDA and IP will be built.
“Intelligent System Design looks to create innovative solutions and analysis tools, layering in machine learning throughout our platforms so that design engineers can be more productive and take advantage of the trends that are unfolding around them.
“Cadence has a broad range of design platforms, so from advanced packaging and board design to software simulation, emulation and acceleration we have the necessary tools, and now, a very rich portfolio for systems designed using the cloud.
“Whether you want to manage your own Cloud ‘world’ or whether you want to work with us, we can offer hosted design solutions, the latest being the Cloudburst platform.”
Cadence is also working more closely with other companies, developing a rich ecosystem.
“In terms of the security of the data in a world of hyper connected systems there are many challenges with embedded safety and security, hence our recent partnership with Greenhills and their rich software development platform,” explained Beckley.
“Nothing can be done in a vacuum. In terms of our Virtuoso RF solution, much like partnering with Greenhills, we have linked up with National Instruments, arguably the leader in 5G test and measurement solutions, gaining access to all their models for mmwave designs.
“It means engineers can now design the chip the package and the module in Virtuoso.”
JasperGold Platform
At CDNLive, Cadence unveiled its JasperGold Formal Verification Platform which, as Beckley explained during his presentation to the conference, features machine learning technology and core formal technology enhancements.
These updates are intended to address the capacity and complexity challenges associated with increasingly advanced SoC designs and aims to improve overall verification.
The platform incorporates Smart Proof Technology to improve verification throughput and machine learning is used to select and parameterise solvers to enable faster first-time proofs.
In addition, machine learning is now being used to optimise successive runs for regression testing, either on premises or in the cloud, and this latest version has been able to demonstrate significantly increased levels of speed.
“We measured averages of 2X faster proof performance out of the box and 5X faster regression runs across our design testcases with the new platform,” said Mirella Negro Marcigaglia, Digital Design Verification Manager at STMicroelectronics.
“This third generation sees a platform that has significantly advanced core formal technology, applying machine learning to achieve tangible performance and scalability benefits for our customers.” Ziyad Hanna |
“We also saw non-converged properties reduced by over 50%. Combined, these improvements have significantly boosted our verification productivity.”
“The first-generation JasperGold platform pioneered commercial formal verification and apps in the market; the second generation integrated Cadence technologies to establish formal verification with mainstream users,” explained Ziyad Hanna, Corporate Vice President, Fabric and Formal Solutions, System & Verification Group at Cadence. “This third generation sees a platform that has significantly advanced core formal technology, applying machine learning to achieve tangible performance and scalability benefits for our customers.”
As Beckley stated, for further advances in technology, innovation will only come from doing things smarter.
