Meanwhile, algorithms need more processing power, wireless stacks mandate larger memories and power budgets are shrinking.
So how are MCU manufacturers coping with the growing list of demands? A number of leading companies have recently launched MCUs built around the ARM Cortex-M4 core.
Øivind Loe, senior strategic marketing manager with Silicon Laboratories, said: “If you look at the Cortex range, the M3 is general purpose and the M0+ is low cost, but the M4 is a more capable core in general.”
Anand Rangarajan, product marketing manager in Microchip’s 32bit MCU business unit, commented: “Something that sat around without the need to communicate now needs connectivity. When that happens, you need more flash and RAM, as well as graphics capability and perhaps the ability to support a touch interface. All this has to be offered at good power/performance and an attractive price.”
Silicon Labs has expanded its EFM32 Gecko portfolio with what it calls ‘industrial strength’ MCUs. It says the EFM32GG11 Giant Gecko MCU family offers the ‘most advanced’ feature set available in the low-power MCU market.
Loe noted that MCU development isn’t just about power. “It’s also about executing tasks efficiently. A simple program with a few clocks will run efficiently on an M0+ core. But if the workload is larger, the M4 core has some special instructions that can allow it to use less energy than the M0+ and more efficiently than some larger cores – and that’s crucial for a range of applications.”
Silicon Labs says GG11 Geckos offer up to 2Mbyte of flash and 512kbyte of RAM to accommodate more code and comms stacks, such as a 10/100 Ethernet MAC and a dual CAN interface. Looking to meet power budgets, the parts boast an active power consumption of 77μA/MHz, while drawing 1.6μA in deep sleep mode.
Microchip’s SAM D5x/E5x MCUs also take advantage of the Cortex-M4’s floating point unit (FPU) to increase system efficiency. Running at up to 120MHz, the D5x and E5x MCUs come with up to 1Mbyte of dual-panel flash and up to 256kbyte of SRAM.
Rangarajan noted: “We’ve listened to our customers, so we’ve included more connectivity in these MCUs. But it’s not just about adding memory, it’s also about more performance and the ability to provide more flexible peripherals, interfaces and connectivity options.”
He pointed out that the original SAM D MCUs – developed by Atmel prior to its acquisition by Microchip – were based on the Cortex-M0+. “But we’ve always wanted to take the product line to the next level of performance. This allows Microchip to address a broader range of consumer and industrial automation applications.”
Bucking the trend to a certain extent, both Silicon Labs and Microchip have limited the clock rate in their latest MCUs. Giant Geckos, for example, have a maximum clock of 72MHz. “These products are focused on energy efficiency,” Loe claimed. “If you build an MCU to run at 200MHz, for example, then each clock cycle will consume more energy than in an MCU running at 72MHz. A lot of MCUs will be used in battery powered apps, so we need to be energy efficient and to enable the CPU to sleep a lot.”
Rangarajan agreed that clock rate is not always the primary factor when it comes to developing MCU portfolios. “We hear our customers saying don’t give me faster clock rates, make sure the MCUs meet my requirements. An app that runs from a battery requires a power efficient MCU. If you want a fast MCU, then you have to make trade offs.”
In Loe’s views, MCU selection is all about the ability to perform certain tasks at a particular power efficiency. “That is always going to involve trade offs, but an M4 based MCU will generally be good for embedded applications with challenging energy consumption requirements.”
Both companies have adopted the concept of smart peripherals in their recent products. Loe explained: “Twenty years ago, most MCUs saw the CPU doing everything. That took a lot of CPU cycles, which meant you couldn’t do as much as you might have liked.
“Today, most apps will take advantage of DMA, which offloads the CPU. In turn, this allows the CPU to do more.”
Rangarajan said Microchip provides what he called ‘sleepwalking’ peripherals. “If there’s a requirement for them to do small numbers of transactions, this can be done without waking the CPU.”
In Silicon Labs’ case, Loe noted: “It’s all about when you have to wake up the M4 core. We’re trying to allow it to sleep for as much as possible. More than half of the peripherals in a Giant Gecko can run autonomously in deep sleep mode.”
Silicon Labs has launched a starter kit to support Giant Gecko based application development
With this approach, a Giant Gecko’s A/D converter can operate while the CPU is in deep sleep mode. “It can sample and use DMA to pull the data into RAM,” Loe continued.
How does an MCU developer differentiate their products from similar devices with an M4 core? Rangarajan pointed to the integration of a buck regulator. “This brings better power efficiency,” he claimed, “which means lower active power consumption; as little as 65µA/MHz. The parts also support flexible pin options.”
Loe highlighted a couple of aspects. “We have included a cyrotimer that runs in shut off; the lowest energy mode. It’s a simple timer that’s useful when you need the CPU to be asleep for minutes.
“And there’s the Peripheral Reflex System, which allows peripherals to talk. For example, the real time clock could tell the A/D converter to take a sample. It gives a level of determinism which you don’t get from a CPU.”
But as the world gets more connectivity, security grows in importance and both companies are keen to highlight their provision.
“We’re offering the best integrated security features,” Rangarajan contended. “SAM Dx/Ex MCUs have crypto hardware acceleration – symmetrical and asymmetrical – and public key encryption, amongst other features. It’s something Microchip has taken to heart and has made sure it’s all in the MCU.
“There’s also tamper detection based on the real time clock and an integrity check monitor, which is like cyclic redundancy check, but which runs at a higher level.
Loe pointed to the security management unit (SMU) as an ‘upgrade’ to the memory protection unit (MPU) associated with the M4’s core. “While the MPU allows you to segment memory into eight regions, the SMU takes that further. The MPU is restricted to eight regions, so there is limited granularity. The SMU allows you to selectively say which pieces of code can access each peripheral.”
“All of this is important,” Rangarajan concluded, “as security will become standard in the next few years.”
