Actel, the fpga specialist recently acquired by Microsemi, has unveiled the first 65nm embedded flash platform – developed in association with UMC – on which it will build its next generation of products.
The move to 65nm will increase logic density by an order of magnitude while doubling performance and reducing dynamic power consumption by 65% compared to the previous 130nm process.
Esam Elashmawi, Actel's vp of silicon engineering, said: "The demand for low power, firm error immunity, security and integration are non negotiable in today's designs. The increase in density and improvements in power and performance allow us to target a much larger portion of the industrial, mil/aero, medical and consumer markets."
Actel sees two broad target markets for fpgas. One is datapath, where the drivers are density, speed and signal processing. The other is sense and control. "Sense and control users don't need the highest density," said Elashmawi, "but they do want low power, reliability, security and as many components integrated on chip as possible."
As part of the migration to 65nm, Actel has also moved its architecture to a four input look up table (LUT) basis. "The three LUT approach was stable at 130nm," said Elashmawi, "but as we're adding high speed serdes at 65nm, the system fabric has to support performance. The four LUT approach provides a balance between power and performance."
The 65nm process will also allow the integration of hardened IP, including microprocessor cores, dsp blocks, high speed transceivers and memory interfaces. Other features of the architecture include dynamic clock gating and an 18 x 18 MAC.
Samples of 65nm based fpgas are said to be with lead customers and volume manufacture is planned for the first half of 2011.
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