Altera fpga benchmarked at 162GFLOPS

The benchmarks were conducted by Berkeley Design Technology (BDTI) using Altera's Stratix V and Arria V fpga development kits. One of the benchmarks involved solving matrix equations using Cholesky and QR decomposition*. Simultaneous sets of complex data linear equations were solved using both methods. In one test using the QR solver, an Altera Stratix V fpga was found to be capable of performing 315 decompositions per second of a 400 × 400 matrix. When running at 203MHz, the fpga achieved a rating of 162×10⁹ floating point operations per second, or 162GFLOPS. "Altera's floating point solution enables designers to use the massive amounts of high performance floating point resources available on an fpga for dsp data paths," said Alex Grbic, Altera's director of product marketing. "By benchmarking our solution with BDTI, Altera debunks the myth that fpgas are limited to high performance fixed point processing." For more on BDTI's benchmark, follow the link below. *QR decomposition is the factorisation of a matrix M of size m x n into an orthonormal matrix Q of size m x n and an upper triangular matrix R of size n x n, such that M = QR.