“Ensuring that SoC verification is completed on time within ever shrinking project schedules is driving the strong need to speed up the underlying logic simulation technology,” said Dr Anirudh Devgan, pictured, general manager of Cadence’s System and Verification Group and Digital and Signoff Group. “Rocketick is the leading, established provider of parallel simulation technology. I look forward to welcoming the Rocketick team to Cadence as we accelerate our innovation in functional verification to solve our customers’ most difficult challenges.”
Rocketick’s technology parallelises simulation on x86 based multicore servers, providing automated partitioning across designs and testbenches, as well as the flexibility to simulate on server farm resources with up to 64 cores. It is also said to provide improved accuracy and enhanced visibility, while reducing the memory requirement by up to three times for gate level designs.
Tomer Ben-David, Rocketick’s CEO, added: “We are very excited to join the Cadence team and look forward to providing even more benefit to customers through the tight integration of Rocketick’s core engines with Cadence’s overall verification solution.”
