The Kudelski Group, a leader in digital security and Internet of Things (IoT) solutions, and Veriest Solutions, a specialist in SoC design, have announced a joint solution for IC designers to enable more efficient integration of secure elements, including RISC-V-based Security Enclaves that are Common Criteria certified, formally verified and targeted at security and safety applications.
With the rapid growth of IoT deployments globally, security has become one of the biggest concerns for both IoT device and ecosystem creators as well as users.
SoC designs increasingly rely on on-chip, physically isolated Security Enclaves to guarantee resilience to physical and side channel attacks intended to compromise such systems. This type of architecture enables a clear separation between security applications and more general functional applications, and avoids giving easy entry points to attackers. It also provides a secure anchor (root of trust) upon which devices can build their trust chain and ensure the integrity of IoT data.
Kudelski has designed a turnkey solution based on RISC-V that is highly secure and optimised for integration into leading-edge design flows. It provides a robust hardware root of trust and contains cryptographic services to enable many trusted functions. It also provides optimsed support for external flash-based systems that can be certified at Common Criteria EAL 5+ level with full support from Kudelski during the certification process.
Veriest provides design-in support and full dynamic and formal verification of such Security Enclaves, thereby enabling customers to obtain the highest level of certification and assurance for their upcoming SoC designs.
"The industry has been exploring RISC-V for many security applications and now the availability of certified and fully verified solutions will accelerate this movement,” said Hardy Schmidbauer, SVP IoT for the Kudelski Group. “This solution is an industry first. Finally, IC vendors can select an independent security technology with the added benefits of full compatibility with the RISC-V eco-system while also attaining the highest standards of verification.”
“We have seen increased interest among our customer base for security and safety solutions. Additionally, the open RISC-V architecture enables unprecedented levels of customization and optimisation, especially for IoT and edge devices. However, seamless integration of such customized solutions into different SoC projects requires flawless execution and expert verification practices, both dynamic and formal," said Moshe Zalcberg, Veriest's CEO.
