Deneb is an architecture modelling and exploration tool for artificial intelligence (AI)-enabled system-on-chip (SoC) products that ensures accurate assessment of SoC performance, power, cost and safety.
An analytical tool for chip architects it provides evidence-based design and IP-selection choices through quantitative analysis.
Deneb includes an extensive library of cycle- accurate and cycle-approximate architectural block models of an AI enabled SoC, these include CPU, memory subsystem, network-on-chip (NOC), tensor and vector processing units, GPU etc., all are parameterized and fully configurable.
A typical use case of Deneb is to simulate the compute pipeline of a neural processing unit (NPU) that is executing a machine learning (ML)-model, and analyses its throughput, latency and memory bandwidth requirements.
The intelligence that’s gathered from such an exercise can then be used to properly size the different components of the NPU pipeline, to achieve the desired performance at minimum power and cost.
Deneb also includes utilities to decompose ML and or non-ML workloads, such as convolutional neural models and LLMs, into task graphs consumed by the models for task-aware HW/SW co-simulation. Deneb can generate analytical reports to show the efficacy of an architecture and perform parameter sweeping to identify the sensitivity regions of the configuration space.
"SoC architecture design and IP selection is a complex task that may make or break an expensive chip project, yet we see a lot of such work conducted based-on a simple spreadsheet analysis or just people's intuitions", said Ms. Li Liu, managing director of Deneb Design, "we are excited to offer an analytical tool to chip architects and help them make evidence-based design and IP-selection choices through quantitative analysis".
