Globalfoundries demos first 3D stacked TSV chips on 20nm
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Globalfoundries has demonstrated its first fully functional SRAM wafers that use TSVs on its 20nm-LPM (low power for mobile) process.
TSVs enable 3D stacking of chips, which not only reduces physical footprint, but also increases bandwidth and reduces power.
At its Fab 8 facility in New York, the company utilised a 'via-middle' approach to TSV integration, inserting the TSVs into the silicon after the wafers completed the Front End of the Line (FEOL) flow and prior to starting the Back End of the Line (BEOL) process.
According to GloFo, this approach avoided the high temperatures of the FEOL manufacturing process, allowing the use of copper as the TSV fill material.
To overcome the challenges associated with the migration of TSV technology from 28 to 20nm, the company's engineers developed a proprietary contact protection scheme, which enabled the TSVs to be integrated with minimal disruption to the 20nm-LPM platform technology.
"Our industry has been talking about the promise of 3D chip stacking for years, but this development is another sign that the promise will soon be a reality," said David McCann, vp of packaging R&D at GloFo. "Our next step is to leverage Fab 8's advanced TSV capabilities in conjunction with our OSAT partners to assemble and qualify 3D test vehicles for our open supply chain model, providing customers with the flexibility to choose their preferred back-end supply chain."
