Goepel accelerates Boundary Scan project development

For the first time, the newly developed tool generation supports a completely project oriented definition of the multiboard target architecture. This, says Goepel, enables the automatic generation of a consistent project database while maintaining original signal designations and board characteristics. The new features are designed for complex projects based on integrated system backplanes or for motherboards with multislot interface. "Our newly developed board merger solves the problem of defining multiboard applications fast and modularly," said Thomas Wenzel, Goepel electronic's managing director, Boundary Scan Division. "Moreover, it enables the flexible reconfiguration of existent projects without regeneration and loss of the original signal designations. In addition to an increase in productivity in handling such applications, debugging is facilitated and diagnostic information quality is improved." According to Goepel, the new board merger generation handles each single board as an individual object with bequeathing properties. Connections between single objects are initiated by respective referencing maintaining the original net designation. I/O modules can be inscribed into the principle as so called adapters and if modules of the same type are utilised, the whole process is handled through duplicating. After referencing all boards, the data basis is generated in a single step. Configuration changes, such as non-mounted boards or missing I/O modules - can be hidden, making a regeneration unnecessary. In subsequent project processing, the entire original data basis is directly available for all other tools such as debugger, visualiser and test coverage analysers. The new board merger is integrated as standard in the System Cascon development package - a JTAG/Boundary Scan development environment developed by Goepel - from version V4.6 onwards.