The new chip was fabricated using GF’s 12nm Leading-Performance (12LP) FinFET process and features Arm’s mesh interconnect technology in 3D that allows data to take a more direct path to other cores, minimising latency while increasing data transfer rates as demanded by data centres, edge computing and high-end consumer applications.
The delivery of this chip demonstrates the fast progress that Arm and GF are making in researching and developing differentiated solutions that enable improvements in device density and performance for scalable high-performance computing. Moreover, the companies validated a 3D Design-for-Test (DFT) methodology, using GF’s hybrid wafer-to-wafer bonding that can enable up to 1 million 3D connections per mm2, extending the ability to scale 12nm designs long into the future.
“Arm’s interconnect technology in 3D enables the semiconductor industry to augment Moore’s Law to address a greater diversity of computing applications,” said Eric Hennenhoefer, vice president, Arm Research. “GF’s expertise in fabrication and advanced packaging capabilities, combined with Arm technology, gives our mutual partners additional differentiation to venture into new paradigms for next generation, high-performance computing.”
“In the era of big data and cognitive computing, advanced packaging is playing a much larger role than it has in the past. The use of AI and the need for power-efficient, high-throughput interconnect is driving the growth of accelerators through advanced packaging,” explained John Pellerin, chief technologist, platforms at GF. “We are delighted to be working with innovative partners such as Arm to deliver advanced packaging solutions which further enable integrating various node technologies optimized for logic scaling, memory bandwidth and RF performance in a small form factor. This work will allow us to uncover new insights in advanced packaging that will enable our mutual clients to create complete, differentiated solutions more efficiently.”
