The fully functional demo chip was manufactured first-time-right and delivered for qualification.
The demo chip, which integrates Weebit Nano’s embedded Resistive Random-Access Memory (ReRAM) module and which is manufactured on SkyWater’s 130 nm CMOS process, is working as expected and achieving the targeted performances including speed, power and die size.
The demo chip is a key enabler for companies to adopt Weebit’s innovative non-volatile memory (NVM) for development of their system-on-chip (SoC) designs for industrial, automotive and consumer applications, while this achievement also demonstrates how IC’Alps design methodology will help companies to shorten design cycles and quickly achieve working silicon.
“IC’Alps performed the physical implementation of the demo chip from Weebit Nano RTL code embedding its non-volatile memory block. This included successful adaptation of an analogue technology design kit for a digital flow. We are obviously very happy with the results as the testing phase completed successfully,” said Lucille Engels, Chief Operating Officer, IC’Alps
“The IC’Alps team is highly skilled with all aspects of physical implementation, from RTL-to-GDS implementation to tape-out. They met schedule and quality targets, and the chip is fully functional,” added Ilan Sever, Vice-President of R&D, Weebit Nano.
The Weebit Nano demo chip comprises a full sub-system for embedded applications, including the Weebit ReRAM module, a RISC-V microcontroller (MCU), system interfaces, memories and peripherals.
The embedded ReRAM module includes a 256Kb ReRAM array, control logic, decoders, Ios (Input/Output communication elements) and error correcting code (ECC).
