Deployed in an advanced 22nm FD-SOI (fully depleted silicon on insulator) process technology, this is the first tape-out of Weebit ReRAM in 22nm, one of the industry’s most common process nodes, and a geometry where embedded flash is not viable.
Weebit worked with its development partners CEA-Leti and CEA-List to scale its ReRAM technology down to 22nm. The teams designed a full IP memory module that integrates a multi-megabit ReRAM block targeting the 22nm FD-SOI process which is designed to support connected and ultra-low power applications such as IoT and edge AI.
As embedded flash is unable to scale below 28nm, new non-volatile memory (NVM) technology is required for smaller process geometries. Weebit ReRAM in 22nm FD-SOI offers a low-power, cost-effective embedded NVM solution which can withstand harsh environmental conditions.
Coby Hanoch, CEO of Weebit Nano, said, “We are continuing to accelerate Weebit’s path towards more advanced geometries to meet a clear market need in applications such as microcontrollers, IoT, 5G, edge AI and automotive. Embedded NVM is a key element of such designs, but since embedded flash is difficult to scale below 28nm, many companies are looking to emerging technologies like ReRAM. There is increased interest from companies looking to use our ReRAM to create exciting new products in these areas.”
Commenting Olivier Faynot, Head of Silicon Component Division, CEA-Leti, added, “FD-SOI technology provides high performance with low voltages and low leakage to enable devices to operate at higher frequencies with better energy efficiency. It also enables easier integration of additional features such as connectivity and security. With Weebit ReRAM available on this process, the industry will have a highly efficient and robust NVM option for their future product innovations.”
Weebit’s embedded ReRAM module includes an 8Mb ReRAM array, control logic, decoders, IOs (Input/Output communication elements) and error correcting code (ECC) and has been designed with unique patent-pending analogue and digital circuitry running smart algorithms that are said to significantly enhance the memory array’s technical parameters.
The demo chips comprise a full sub-system for embedded applications, including the Weebit ReRAM module, a RISC-V microcontroller (MCU), system interfaces, memories and peripherals.
