The FPGA uses Intel’s Embedded Multi-die Interconnect Bridge (EMIB) technology which stitches two Stratix 10 GX FPGA core fabric die (with a capacity of 5.1 million logic elements per die) along with appropriate I/O tiles.
The chip is targeted at the ASIC prototyping and emulation market and multiple customers have already received operational samples.
The Stratix 10 GX 10M FPGA is the first Intel FPGA to use EMIB to logically and electrically bond two FPGA fabric die together. For this device, tens of thousands of connections link the two FPGA fabric die through multiple EMIB die, resulting in a high-bandwidth connection between the two monolithic FPGA fabric die.
Previously, Intel has used EMIB technology to connect I/O and memory tiles to FPGA die.
For example, Intel Stratix 10 MX devices incorporate either 8 or 16 Gbytes of EMIB-connected, 3D stacked HBM2 SRAM tiles. The Intel Stratix 10 DX FPGA incorporates EMIB-connected P tiles that provide PCIe 4.0 compatibility.
