Lattice has programmable pal for ASICs
1 min read
Lattice Semiconductor has introduced an 'application friendly' FPGA, the ECP5, designed to sit next to an ASIC or ASSP in such applications as small cells, micro servers, broadband access and video cameras.
Deepak Boppana, Lattice's product line manager for the ECP5 family, described the necessity for the product in the small cell environment: "We are still in such early stages of small cell deployment and there is a wide range of requirements that need to be met – the standards are still evolving and there is talk about LTE, LTE advanced, talk about combining WiFi in boxes as well, so not only are end standards changing, we see incompatibility between the interfaces between the components on the boards and that is where we see customers needing programmability in these systems."
The ECP5 is designed to be low cost, small form factor (10mm x 10mm) and low power – a PCIe link can be implemented using as little as 0.25W.
"If you look at competitor FPGAs with SERDES in this 10x10 sized package it will only be able to support up to 35k LUTs, no higher than that," claimed Boppana. "So by providing up to 85k LUTs in such a small package we are more than doubling the functional density."
