MEMS structures could be tested 100 times faster

Currently, mems systems can only be inspected one at a time and can be a time consuming and expensive process. The EU's SMATIEHS programme is developing a new test concept based on parallel inspection of the circuits at wafer level. By testing 100 units at once, the time required is reduced from 20 minutes to under 30 seconds. The research team uses an array of interferometers which can identify an object's shape, changes in shape and vibration. Standard microprocessor techniques are used to manufacture interferometers, which reduces cost. The researchers plan to produce a specially designed glass wafer that contains as many as 100 interferometers and then use this last to test 100 circuits on a mems wafer at one go. Kay Gastinger of SINTEF ICT, who is coordinating the project, said: "We have already produced a prototype measurement station that is capable of measuring five chips at a time. The prototype consists of three wafers; the lens wafer, mirror wafer and beam splitter wafer. The top layer contains 25 tiny lenses, which in principle resemble little microscopes and have an imaging function. Micromirrors at the centre of the lenses produce the interference effect." The project, coordinated by SINTEF, with eight European microoptics companies participating, is due to come to an end in 2011. If successful, by then the demonstrator will have been expanded to 50 channels and the design will enable this number to be increased to 100.