Risk is the biggest issue facing semiconductor manufacturers, according to Professor Asen Asenov, the Glasgow University academic who is also chief executive of Gold Standard Simulations (GSS), which specialises in predictive simulation of nano CMOS devices.
"We are trying to help the industry to narrow their technology options," he said. "Simulation helps them to reduce their exposure to risk – and there are big risks in choosing technology. It's a good time for an agile company like GSS."
GSS's focus is beyond the 10nm node, where Prof Asenov believes the best candidate is nanowire transistors – also known as gate all round transistors – which are likely to scale to the 5nm node. "But 5nm is likely to be the end of scaling," he said. "Beyond that, it's likely to be physically impossible."
Prof Asenov sees nanowire transistors as 'better designed FinFETs'. "FinFETs cover three of the four sides of the channel, so are better than MOSFETs. Nanowire transistors cover all four sides of the channel, which means less leakage and more drive current. And they may not be so difficult to make."
But at these dimensions, quantum effects come into play. "Quantum mechanics play a big role, so our software includes features that allow users to simulate very accurately the performance of these transistors," said Prof Asenov.
GSS' GARAND simulator is being offered as a way for manufacturers to explore the way forward. "Each variant will take money to develop, so companies look to use simulation as much as possible to reduce their exposure to risk. If you try to experiment, it's very expensive and takes a long time. Bad decisions can take you in the wrong direction."
However, working at the 5nm node will not be for the faint hearted. "Few big companies will remain," Prof Asenov believes. "Those that do will get all the business; it will be much like Boeing and Airbus." However, he doesn't see one foundry dominating. "That company would be too powerful; there will be two or three."
